Match the following lists :List – I List – II a. IC 7400 i. Quad 2-input NOR gate b. IC 7402 ii. Quad 2-input AND gate c. IC 7408 iii. Quad 2-input OR gate d. IC 7432 iv. Quad 2-input NAND gate
a-iv, b-i, c-ii, d-iii
These four part numbers are the foundation of the 7400 TTL family and are worth knowing cold.
| Device | Function | Match |
|---|---|---|
| 7400 | Quad 2-input NAND | iv |
| 7402 | Quad 2-input NOR | i |
| 7408 | Quad 2-input AND | ii |
| 7432 | Quad 2-input OR | iii |
Why the 7400 is the NAND. The very first part in the family is the NAND for a good reason: NAND is functionally complete, so any Boolean function whatever can be built from NAND gates alone, and in TTL the NAND is also the natural output of a multi-emitter input transistor with a totem-pole stage — it costs fewer transistors than an AND. That is why the AND (7408) is internally a NAND followed by an inverter and is therefore slower than the NAND, not faster.
Memory aids for the rest. The two inverting gates come first in the numbering — 7400 NAND then 7402 NOR — and their non-inverting counterparts come later, 7408 AND and 7432 OR. Two more worth carrying with them: 7404 is the hex inverter and 7486 the quad 2-input XOR.
Note the pin-out trap on the 7402. Unlike almost every other gate package, the 7402's outputs are on pins 1, 4, 10 and 13 — the inputs and outputs are reversed relative to the 7400. Wiring a 7402 as if it were a 7400 is one of the commonest laboratory mistakes.
Assemble. a-iv, b-i, c-ii, d-iii — option 2. The near-miss is option 1, which correctly places the 7400 as NAND but then swaps the NOR and AND assignments for the 7402 and 7408.
Hence, the correct matching is a-iv, b-i, c-ii, d-iii.
Similar Questions
Arrange in ascending order based on power dissipation the following logic families :
(i) ECL
(ii) TTL
(iii) CMOSMatch the following :
List – I List – II a. I2L i. XOR b. high impedance state ii. non-saturation logic c. controlled inverter iii. tristate d. ECL iv. bipolar logic Codes :
Given that for a logic family :
(A) VOH is the maximum output high level voltage
(B) VOL is the maximum input low level voltage
(C) VIH is the minimum input acceptable input high voltage level
(D) VIL is the minimum acceptable input low voltage levelChoose the most appropriate answer from the options given below :
The logic families have fan out more than TTL
A. RTL
B. ECL
C. DTL
D. CMOS
Choose the correct answer from the options given below.
Match the following lists in terms of power dissipation/Gate:
List – I List – II a. BiCMOS i. 6 mW b. ECL ii. 2.75 μW c. CMOS (AHC) iii. 25 mW to 73 mW d. bipolar TTL (F) iv. 17 μw Choose the correct answer from the codes given below:
Arrange the following in terms of decreasing order of power dissipation :
(a) CMOS
(b) ECL
(c) TTL
(d) MOS
The correct sequence of decreasing order of power dissipation is
For a three state TTL following statements are given :
(a) It allows to connect outputs directly.
(b) It allows to connect the inputs directly.
(c) It is used to decrease the switching time.
(d) It is used to increase the switching time in order to interface the peripherals for matching the speed with computer.
Which of the above are correct ?
Match the following in context of Fan out of various families :
List - I List - II (a) DTL (i) 20 (b) TTL (ii) 30 (c) PMOS (iii) 50 (d) CMOS (iv) 5 to 15 Codes :
For wired AND connection we should use :
Match the following :
List - I List - II (a) TTL (i) Consumer maximum power (b) ECL (ii) Highest Packaging Density (c) NMOS (iii) Least power consumption (d) CMOS (iv) Saturated logic Codes :
Important Questions from Logic Families
Which of the following pair is correct?
I. RTL – Saturated bipolar logic family
II. ECL – Non-Saturated bipolar logic family
- Which of the following logic families has the maximum noise margin?
The figure of merit of digital IC is defined as:
- Which of the following logic families has the highest packing density?
The figure of merit of logic family is often measured in the unit of:
