Match the following lists in terms of power dissipation/Gate: Choose the correct answer from the codes given below:List – I List – II a. BiCMOS i. 6 mW b. ECL ii. 2.75 μW c. CMOS (AHC) iii. 25 mW to 73 mW d. bipolar TTL (F) iv. 17 μw
a-iv, b-iii, c-ii, d-i
Rank the four technologies by how they draw current, and the numbers fall into place without memorising them.
b → iii. ECL — 25 to 73 mW, by far the highest. Emitter-coupled logic keeps its differential pair permanently conducting and never lets the transistors saturate. That constant bias current is what makes it the fastest bipolar family, and it is also why it burns the most power. Anything in the tens of milliwatts must be ECL.
d → i. Bipolar TTL (F) — 6 mW. TTL draws current whenever its output transistors conduct, so it sits in the milliwatt range — an order of magnitude below ECL but far above anything CMOS.
c → ii. CMOS (AHC) — 2.75 μW, the smallest. In a CMOS gate one of the two complementary transistors is always off, so in the steady state no d.c. path exists between supply and ground and only leakage flows. Static dissipation is in microwatts; the real power is dynamic,
\(P=\alpha C_LV_{DD}^{2}f\)
which is why CMOS power rises with clock frequency while ECL's does not.
a → iv. BiCMOS — 17 μW. BiCMOS uses CMOS for the logic and bipolar transistors only at the output, to drive heavy capacitive loads quickly. It therefore inherits CMOS's microwatt-level static power, but a little higher than pure CMOS because of the bipolar stages.
The ordering that settles the matching:
\(\text{CMOS} \lt \text{BiCMOS} \ll \text{TTL} \lt \text{ECL}\)
— 2.75 μW, 17 μW, 6 mW, 25–73 mW. Matching by magnitude alone gives the answer, and the pattern (microwatts for the two MOS-based families, milliwatts for the two bipolar ones) is the fact worth carrying away.
Hence, the correct matching is a-iv, b-iii, c-ii, d-i.
Arrange in ascending order based on power dissipation the following logic families :
(i) ECL
(ii) TTL
(iii) CMOS
Match the following :
| List – I | List – II |
| a. I2L | i. XOR |
| b. high impedance state | ii. non-saturation logic |
| c. controlled inverter | iii. tristate |
| d. ECL | iv. bipolar logic |
Codes :
Given that for a logic family :
(A) VOH is the maximum output high level voltage
(B) VOL is the maximum input low level voltage
(C) VIH is the minimum input acceptable input high voltage level
(D) VIL is the minimum acceptable input low voltage level
Choose the most appropriate answer from the options given below :
The logic families have fan out more than TTL
A. RTL
B. ECL
C. DTL
D. CMOS
Choose the correct answer from the options given below.
Arrange the following in terms of decreasing order of power dissipation :
(a) CMOS
(b) ECL
(c) TTL
(d) MOS
The correct sequence of decreasing order of power dissipation is
For a three state TTL following statements are given :
(a) It allows to connect outputs directly.
(b) It allows to connect the inputs directly.
(c) It is used to decrease the switching time.
(d) It is used to increase the switching time in order to interface the peripherals for matching the speed with computer.
Which of the above are correct ?
Match the following in context of Fan out of various families :
| List - I | List - II |
| (a) DTL | (i) 20 |
| (b) TTL | (ii) 30 |
| (c) PMOS | (iii) 50 |
| (d) CMOS | (iv) 5 to 15 |
Codes :
For wired AND connection we should use :
Match the following :
| List - I | List - II |
| (a) TTL | (i) Consumer maximum power |
| (b) ECL | (ii) Highest Packaging Density |
| (c) NMOS | (iii) Least power consumption |
| (d) CMOS | (iv) Saturated logic |
Codes :
Match the following lists :
| List – I | List – II |
| a. IC 7400 | i. Quad 2-input NOR gate |
| b. IC 7402 | ii. Quad 2-input AND gate |
| c. IC 7408 | iii. Quad 2-input OR gate |
| d. IC 7432 | iv. Quad 2-input NAND gate |
Which of the following pair is correct?
I. RTL – Saturated bipolar logic family
II. ECL – Non-Saturated bipolar logic family
The figure of merit of digital IC is defined as:
The figure of merit of logic family is often measured in the unit of: