What is the voltage at the output node of the given circuit? Assume $V_{DD} = 1.8V$ and threshold voltage of the transistor $V_{TN} = 0.4V$ and body bias effect is negligible.
To determine the output voltage of the given circuit, we need to analyze the behavior of the transistors, assuming both transistors are NMOS and that the body bias effect is negligible.
The circuit shown depicts a cascade of two NMOS transistors, M1 and M2. Given:
- \(V_{DD} = 1.8\,V\)
- Threshold voltage, \(V_{TN} = 0.4\,V\)
Initially, let's look at transistor M1. For it to conduct:
- The gate-source voltage \(V_{GS1}\) must be greater than the threshold voltage \(V_{TN}\).
- For M1, \(V_{GS1} = V_{DD} - V_{DD} = 0\), so it cannot conduct.
Since M1 is off, let's consider the next stage: M2.
- If \(V_{out}\) at the output node is going to affect M2, then we'll have:
- \(V_{GS2} = V_{DD}\) because gate and source of M2 is connected to \(V_{DD}\).
- M2 will start conducting if \(V_{GS2} = 1.8\,V - V_{out} \gt V_{TN}\).
To find \(V_{out}\), we solve for equilibrium where M2 enters saturation:
- \(1.8 - V_{out} = 0.4\)
- \(V_{out} = 1.8 - 0.4 = 1.4\,V\)
Actually, considering the current path and assuming no threshold voltage losses beyond the initial transistor gate, the stable output will reach \(1.0\,V\), as the circuit reaches a stable equilibrium with both transistors essentially switched but the voltage held.
Therefore, the output voltage at the output node is 1.0 V.
Important Questions from Logic Families
Which of the following pair is correct?
I. RTL – Saturated bipolar logic family
II. ECL – Non-Saturated bipolar logic family
- Which of the following logic families has the maximum noise margin?
The figure of merit of digital IC is defined as:
- Which of the following logic families has the highest packing density?
The figure of merit of logic family is often measured in the unit of:
