In 8255 programmable peripheral interface device, if the port A and port B are to be set in a hand shake mode along with port C, what are the bits in the 8 bit control word to be set as 0 1 0.$D_7$ $D_6$ $D_5$ $D_4$ $D_3$ $D_2$ $D_1$ $D_0$
D6, D5 and D2
This question was cancelled by UGC. The official answer key marks it with an asterisk, whose footnote reads “* DENOTES MARKS GIVEN TO ALL CANDIDATES” — every candidate was awarded the two marks whatever they marked. The discussion below therefore gives the best-supported reading of the item rather than a uniquely correct option.
Handshake mode is Mode 1, and the mode of each group is selected by exactly three bits of the control word — D6 and D5 for Group A, D2 for Group B. Those are the bits the question is asking about, so the answer is option 1.
The I/O-mode control word, bit by bit :
| Bit | Meaning | Value here |
|---|---|---|
| D7 | 1 = I/O mode set flag | 1 |
| D6 D5 | Group A mode: 00 = 0, 01 = 1, 1x = 2 | 0 1 |
| D4 | Port A direction | — |
| D3 | Port C upper direction | — |
| D2 | Group B mode: 0 = 0, 1 = 1 | 0 → 1 for handshake |
| D1 | Port B direction | — |
| D0 | Port C lower direction | — |
The pattern "0 1 0" in the question is the sequence D6 D5 D2 read in order, and the three positions it occupies are exactly the mode-select positions. Note the asymmetry the table makes plain: Group A gets two bits because it supports three modes, whereas Group B gets one bit because it supports only Mode 0 and Mode 1 — Mode 2, the bidirectional mode, is available on Port A alone.
What Mode 1 actually does. Ports A and B become 8-bit handshaken ports, and Port C is commandeered to carry the handshake signals: three lines for each of A and B, leaving just two of its eight bits free for ordinary I/O. That is why the question phrases it as "along with port C" — setting both groups to Mode 1 consumes six of Port C's lines for \(\overline{STB},\ IBF,\ INTR\) on input, or \(\overline{OBF},\ \overline{ACK},\ INTR\) on output.
Why handshaking is needed at all : it lets a slow peripheral tell the processor when data is ready or has been taken, replacing wasteful polling with an interrupt. Mode 0 offers no such signals — it is simple latched I/O with no status lines whatever.
The answer is flagged because the printed wording is compressed and the bit ordering has to be inferred; but D6, D5 and D2 are unambiguously the mode-selection bits.
Hence, the bits are D6, D5 and D2.
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