Match the following : Codes :List – I (Pin terminals) List – II (Applications) a. SID, SOD i. Wait state b. READY ii. Serial data transfer c. TRAP iii. Address Latch Control d. ALE iv. Interrupt
a-ii, b-i, c-iv, d-iii
Each pin's own name gives it away, so the match is a-ii, b-i, c-iv, d-iii — option 1.
| Pin | Expansion | Function |
|---|---|---|
| SID, SOD | Serial Input Data, Serial Output Data | ii. Serial data transfer |
| READY | — | i. Wait state |
| TRAP | — | iv. Interrupt |
| ALE | Address Latch Enable | iii. Address latch control |
SID and SOD are read and written by the RIM and SIM instructions respectively, letting software shift data one bit at a time — a serial port built from two pins and a delay loop, with no UART needed.
READY handles slow memory. The processor samples this pin during each machine cycle; if it is found low, the 8085 inserts wait states — idle clock periods during which the address and data lines are held steady — and keeps inserting them until READY goes high. A memory or peripheral too slow to answer within the normal cycle can therefore be used without slowing the whole system, since only accesses to that device are stretched.
TRAP is the highest-priority interrupt and has two properties the others lack: it is non-maskable, so neither DI nor SIM can disable it, and it is edge- and level-triggered, so a single noise spike cannot fire it. Both features suit its intended use for events that must never be ignored — power failure, most classically, where the routine has a few milliseconds to save the machine state before the supply collapses.
ALE solves the multiplexed-bus problem. The 8085 sends the low byte of the address and the data byte over the same eight pins, AD0–AD7, to save package pins. ALE goes high during the first clock state of every machine cycle, precisely while those lines carry the address, and the falling edge is used to clock an external latch — a 74LS373 or an 8212 — which then holds the address steady for the rest of the cycle while the same wires carry data.
Hence, the correct code is a-ii, b-i, c-iv, d-iii.
Similar Questions
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Important Questions from Microprocessors
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Description
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