Which of the following peripherals provide I/O facilities ? i. 8279 ii. 8155 iii. 8259 iv. 8255
ii, iv
The 8155 and the 8255 are the two devices in the list whose purpose is parallel I/O ports — option 4.
| Device | What it is | General-purpose I/O ports? |
|---|---|---|
| 8279 | Keyboard / display controller | Dedicated, not general |
| 8155 | 256 B RAM + I/O ports + timer | ✓ Two 8-bit and one 6-bit port |
| 8259 | Programmable interrupt controller | ✗ No data ports at all |
| 8255 | Programmable peripheral interface | ✓ Ports A, B and C |
The 8255 is the archetype: three 8-bit ports and a control register, each port programmable as input or output, with three modes — simple I/O, handshaken I/O, and bidirectional on port A. Nothing else is in the chip.
The 8155 is a combination device meant to make a minimum-component system possible: static RAM, a 14-bit timer, a built-in address latch for the multiplexed bus, and two 8-bit ports plus a 6-bit port. An 8085, an 8155 and an EPROM form a complete microcomputer.
Why the 8259 is unambiguously excluded. It manages interrupts — prioritising up to eight requests, supplying the vector address, masking individual lines — and has no data ports whatever. It moves no user data between processor and peripheral.
Why the answer is flagged. The 8279 is the awkward case. It genuinely interfaces the outside world, scanning a 64-key matrix and refreshing a 16-digit display, so in a loose sense it provides I/O. But its lines are dedicated to that keyboard-and-display function and are not programmable general-purpose port bits, which is what "provide I/O facilities" means in this context. Since no option pairs 8155 with 8255 and 8279, and every option offering 8279 or 8259 excludes one of the two true I/O chips, option 4 is the intended answer.
The family in one line : 8255 and 8155 give ports, 8259 gives interrupts, 8279 gives a keyboard and display, 8251 gives serial communication, 8253 gives timers.
Hence, the peripherals providing I/O facilities are 8155 and 8255.
| $D_7$ | $D_6$ | $D_5$ | $D_4$ | $D_3$ | $D_2$ | $D_1$ | $D_0$ |
In 8255 programmable peripheral interface device, if the port A and port B are to be set in a hand shake mode along with port C, what are the bits in the 8 bit control word to be set as 0 1 0.
The number system for the machine code of the microprocessor 8085 is
Which of the options in a multipurpose instruction used to implement the interrupt of 8085 and serial data input ?
Both 8155 and 8255 programmable peripheral interface ICs have the following common features :
(i) Programmable I/Os
(ii) Either port A or Port B can be set as either input or output ports.
(iii) One 14-bit down counter
(iv) AD0 – AD7 are multiplexed address/datalines.
Each instruction in an assembly program has the following fields :
(i) Lable field
(ii) Operand field
(iii) Comment field
(iv) Mnemonic field
Please write the proper sequence of fields :
The mnemonic of 8085 processor indicate :
| List – I | List – II |
| a. RLC | i. Rotate Accumulator Right through carry |
| b. RRC | ii. Rotate Accumulator Left through carry |
| c. RAR | iii. Rotate Accumulator Left |
| d. RAL | iv. Rotate Accumulator Right |
Codes :
Match the following :
| List – I (Pin terminals) | List – II (Applications) |
| a. SID, SOD | i. Wait state |
| b. READY | ii. Serial data transfer |
| c. TRAP | iii. Address Latch Control |
| d. ALE | iv. Interrupt |
Codes :
Assertion (A) : In serial communication system, when the transmission of data goes in both ways, it is called full-duplex system. Now if two micro processors are connected in full duplex mode, the amount of data transmitted will be double to the amount of data in half-duplex mode connection.
Reason (R) : When the transmission of data goes in one way, it is called half-duplex system and when the data moves in both ways, it is called full duplex system.
The assembler directive used to give name to some value or symbol for 8086 ASM-86 is
Match the following :
| List – I | List – II |
| a. 8086 | i. 128 byte RAM |
| b. 8051 | ii. 2-key lockout |
| c. 8279 | iii. 3-chip configuration |
| d. 8085 | iv. maximum mode |
Codes :
An 8086 address bus is a/an _____ -bit bus
Match the columns.
Pin | Description |
a. D 0-D 7 | 1. Reset Input |
b. RESET | 2. Data Lines |
c. A 0,A 1 | 3. Internal Address |
An 8 bit microcontroller has an external RAM with the memory map from 8000 H to 9FFF H. How many number of bytes can this RAM store?
In 8085 microprocessor, initially the number decimal 8 is stored. If instruction RAL is executed twice on this number, the final number stored will be
Which of the following 8085 microprocessor instructions occupies 3 bytes in memory?