Match the following : Codes :List – I List – II a. 8086 i. 128 byte RAM b. 8051 ii. 2-key lockout c. 8279 iii. 3-chip configuration d. 8085 iv. maximum mode
a-iv, b-i, c-ii, d-iii
Each phrase in List II is a term of art belonging to exactly one device: a-iv, b-i, c-ii, d-iii — option 3.
| Device | Match | Meaning |
|---|---|---|
| a. 8086 | iv. Maximum mode | MN/MX pin grounded, for multiprocessor systems |
| b. 8051 | i. 128 byte RAM | On-chip data memory of the microcontroller |
| c. 8279 | ii. 2-key lockout | Keyboard scanning mode |
| d. 8085 | iii. 3-chip configuration | Minimum working system |
a — maximum mode. The 8086 has a pin that selects between two modes. In minimum mode it generates its own control signals and works as a single processor. In maximum mode it emits three status lines instead, and an external 8288 bus controller decodes them — which allows a coprocessor such as the 8087 or another bus master to share the system bus, arbitrated by the 8289. The mode exists specifically for multiprocessor systems.
b — the 128 bytes. The 8051 is a microcontroller: processor, memory and peripherals on one chip. Its on-chip data RAM is 128 bytes, of which the lower 32 are the four register banks and the next 16 are bit-addressable. The figure is small because the RAM is for variables and stack only; program code lives in the separate 4 KB of ROM, the Harvard split that distinguishes the 8051 from the 8085.
c — two-key lockout. A keyboard-scanning controller must decide what to do when two keys are pressed at once. The 8279 offers two policies: two-key lockout, which ignores both unless one is released first — the safer choice, preventing spurious entries from a clumsy keystroke — and N-key rollover, which enters each key independently in the order detected, preferred for fast typing. The 8279 also debounces and buffers up to eight keystrokes in a FIFO.
d — the three-chip system. The 8085's best-known selling point was that a complete microcomputer needed only three chips: the 8085 processor, an 8155 (RAM, I/O ports, timer and address latch) and an 8355 or 8755 (ROM with I/O ports). Because those support chips contain the address latch that demultiplexes the AD bus, no glue logic is required at all — a considerable advantage in 1977.
Hence, the correct code is a-iv, b-i, c-ii, d-iii.
| $D_7$ | $D_6$ | $D_5$ | $D_4$ | $D_3$ | $D_2$ | $D_1$ | $D_0$ |
In 8255 programmable peripheral interface device, if the port A and port B are to be set in a hand shake mode along with port C, what are the bits in the 8 bit control word to be set as 0 1 0.
The number system for the machine code of the microprocessor 8085 is
Which of the options in a multipurpose instruction used to implement the interrupt of 8085 and serial data input ?
Both 8155 and 8255 programmable peripheral interface ICs have the following common features :
(i) Programmable I/Os
(ii) Either port A or Port B can be set as either input or output ports.
(iii) One 14-bit down counter
(iv) AD0 – AD7 are multiplexed address/datalines.
Each instruction in an assembly program has the following fields :
(i) Lable field
(ii) Operand field
(iii) Comment field
(iv) Mnemonic field
Please write the proper sequence of fields :
The mnemonic of 8085 processor indicate :
| List – I | List – II |
| a. RLC | i. Rotate Accumulator Right through carry |
| b. RRC | ii. Rotate Accumulator Left through carry |
| c. RAR | iii. Rotate Accumulator Left |
| d. RAL | iv. Rotate Accumulator Right |
Codes :
Match the following :
| List – I (Pin terminals) | List – II (Applications) |
| a. SID, SOD | i. Wait state |
| b. READY | ii. Serial data transfer |
| c. TRAP | iii. Address Latch Control |
| d. ALE | iv. Interrupt |
Codes :
Assertion (A) : In serial communication system, when the transmission of data goes in both ways, it is called full-duplex system. Now if two micro processors are connected in full duplex mode, the amount of data transmitted will be double to the amount of data in half-duplex mode connection.
Reason (R) : When the transmission of data goes in one way, it is called half-duplex system and when the data moves in both ways, it is called full duplex system.
The assembler directive used to give name to some value or symbol for 8086 ASM-86 is
Which of the following peripherals provide I/O facilities ?
i. 8279
ii. 8155
iii. 8259
iv. 8255
An 8086 address bus is a/an _____ -bit bus
Match the columns.
Pin | Description |
a. D 0-D 7 | 1. Reset Input |
b. RESET | 2. Data Lines |
c. A 0,A 1 | 3. Internal Address |
An 8 bit microcontroller has an external RAM with the memory map from 8000 H to 9FFF H. How many number of bytes can this RAM store?
In 8085 microprocessor, initially the number decimal 8 is stored. If instruction RAL is executed twice on this number, the final number stored will be
Which of the following 8085 microprocessor instructions occupies 3 bytes in memory?