A microprocessor is a semiconductor chip fabricated with entire central processing unit (CPU) on it. It is a programmable device that accepts binary data from an input device, processes the data according to the instructions stored in the memory and provides results as output. Basically microprocessor performs two functions - (a) Fetches an instruction from the memory and (b) Performs the operation specified by the instruction. There are special inputs to the microprocessor called interrupts. External devices use these interrupts to get the microprocessor attention. A micro computer can be built by using 8085 microprocessor along with many other chips such as 8155, 8255, 8279, 8253, 8257, 8259, 8251 etc. 8085 microprocessor is 8-bit microprocessor which has 8-bit data registers where as 8086 is a 16-bit microprocessor.
Which instruction cannot force the 8086 processor to come out of 'HALT' state ?
HOLD
What the HALT state is. Executing HLT stops the 8086's instruction execution. The processor floats its buses, stops fetching, and simply waits — a low-power idle from which only an external event can rescue it.
Three signals are candidates, and only two work.
| Signal | Brings the 8086 out of HALT? | What happens |
|---|---|---|
| Interrupt request (INTR with IF = 1, or NMI) | Yes | The ISR runs, and execution resumes at the instruction after HLT |
| RESET | Yes | The processor restarts from FFFF0H with all registers reinitialised |
| HOLD | No | The bus is granted to the requesting device, then the processor returns to HALT |
Why HOLD is the exception, and it is a matter of purpose. HOLD is a bus request, not an execution request. A DMA controller raises HOLD to borrow the buses; the 8086 answers with HLDA and tri-states its bus drivers. Nothing about that sequence asks the processor to execute anything. When the device drops HOLD, the 8086 takes its buses back and returns to exactly the halted state it was in. So the answer is option 4.
The contrast with the interrupt lines. An interrupt is a request for processing: the processor must push the flags, CS and IP, fetch the vector from the interrupt vector table at the bottom of memory, and execute the service routine. Since that is execution, HALT necessarily ends. Note the qualification on INTR — it is maskable, so it only works if the interrupt flag has been set by STI. NMI on pin 17 cannot be masked and will always wake the processor, which is why it is reserved for events such as a power-failure warning.
The practical use of HLT. A program that has nothing to do until an event occurs executes HLT rather than spinning in a polling loop — the processor consumes less power and generates no bus traffic, and the interrupt that signals the event brings it straight back to life. The same idea survives in every modern CPU as the halt or wait-for-interrupt instruction at the heart of an idle task.
Hence, the signal that cannot bring the 8086 out of HALT is HOLD.
Similar Questions
Which flag of 8051 works as 1-bit accumulator ?
Read the following statements :
ST 1 : Queue is provided in 8086.
ST 2 : Slow memory does not degrade speed operation of 8086.Assertion (A) : Any program written for 8080 will run without any changes on 8085.
Reason (R) : Any program written for 8086 will run without changes on 8085.
How many conditional flags are there in the program status word register (psw) in the microcontroller 8051 ?
In the following 8051 assembly language program :
MOV A, # 25H
MOV B, # 78H
MUL AB(A) A = 11H, B = 58H
(B) A = 58H, B = 11H
(C) CY = 0 and OV = 1
(D) CY = 1 and OV = 1Choose the most appropriate answer from the options given below :
In a 8051 microcontroller, ACALL (absolute call) instruction has the following interpretation :
(A) It is a two byte instruction
(B) It is a three byte instruction
(C) The target address of the subroutine must be within 2k bytes because only 11 bits of the 2 bytes are used for the address
(D) There is no difference between ACALL and LCALL in terms of saving the program counter on the stack
(E) The target address can be anywhere within 64k bytesChoose the most appropriate answer from the options given below :
Arrange the following interrupts in order of their priority upon reset in case of 8051 micro controller.
(A) INT 0
(B) INT 1
(C) TF 0
(D) TF 1
(E) (R1 + T1)Choose the most appropriate answer from the options given below :
Assertion (A) : For 8086 microprocessor, the CS:IP loaded in the beginning with the required address from which the execution is to be started.
Reason (R) : The microprocessor does not perform the next fetch operation till at least one byte of the instruction queue is emptied.
The following statements are w.r.t 8086 μp :
(a) The width of the address bus for memory referencing is 20 bit
(b) Instruction Pointer (IP) register is an 8-bit register
(c) There are six conditional flags and three control flagsWhich of them are correct ?
In 8086 microprocessor which is true ?
(a) Coprocessor is interfaced in MAX mode
(b) Coprocessor is interfaced in MIN mode
(c) I/O can be interfaced in MAX/MIN mode
(d) Supports pipeliningOptions :
Important Questions from Different Processors - Teaching
Match List I with List II:
List I
(Communication Mode)
List II
(Features)
(A) Mode 0 (I) High speed; 8-bit shift register; one
baud rate of f/12
(B) Mode 1 (II) Standard 8-bit UART; variable baud rate using time 1 overflows (C) Mode 2 (III) Multiprocessor 9-bit UART: variable baud rate using time 1 overflows (D) Mode 3 (IV) Multiprocessor 9-bit UART; two
baud rates of f/32 and f/64
Choose the correct answer from the options given below:
Which of the following is/are NOT processor control instructions?
A. STC
B. CMC
C. JNO
D. NOP
E. CWD
Choose the correct answer from the options given below:
Which flag of 8051 works as 1-bit accumulator ?
Read the following statements :
ST 1 : Queue is provided in 8086.
ST 2 : Slow memory does not degrade speed operation of 8086.Assertion (A) : Any program written for 8080 will run without any changes on 8085.
Reason (R) : Any program written for 8086 will run without changes on 8085.
