The JFET in a circuit shown in Figure, has an IDSS = 10 mA and Vp = − 5V. The value of resistance RS for a drain current IDS = 6.4 mA is (Choose the nearest value)
150 Ω
Self-bias works because the drain current makes its own gate-source voltage. The gate draws no current, so it sits at 0 V, while the source rises to \(I_{D}R_{S}\) above ground. Therefore
\(V_{GS}=V_{G}-V_{S}=0-I_{D}R_{S}=-I_{D}R_{S}\)
The negative sign is what reverse-biases the gate of an n-channel JFET without any extra supply — the whole point of the arrangement.
Step 1 — find VGS from Shockley's equation.
\(I_{D}=I_{DSS}\left(1-\dfrac{V_{GS}}{V_{P}}\right)^{2}\)
Rearranged for VGS,
\(V_{GS}=V_{P}\left(1-\sqrt{\dfrac{I_{D}}{I_{DSS}}}\right)\)
Substituting the numbers,
\(\sqrt{\dfrac{6.4}{10}}=\sqrt{0.64}=0.8\)
\(V_{GS}=-5\left(1-0.8\right)=-5(0.2)=-1\ \text{V}\)
The perfect square is deliberate — the examiner chose 6.4 mA precisely so that the root comes out exactly 0.8 and no calculator is needed.
Step 2 — get RS.
\(R_{S}=\dfrac{\left|V_{GS}\right|}{I_{D}}=\dfrac{1\ \text{V}}{6.4\ \text{mA}}=156.25\ \Omega\)
The nearest standard value offered is 150 Ω — option 1.
| Quantity | Value |
|---|---|
| IDSS | 10 mA |
| VP | −5 V |
| ID | 6.4 mA |
| VGS | −1 V |
| RS | ≈ 156 Ω → 150 Ω |
A sanity check on the operating point. The device must be on but not fully on: \(V_{GS}=-1\ \text{V}\) lies between the pinch-off voltage −5 V and zero, and the resulting current 6.4 mA is a sensible fraction of the 10 mA IDSS. Had the answer come out with \(\left|V_{GS}\right| \gt \left|V_{P}\right|\), the device would have been cut off and the arithmetic would have been wrong somewhere.
Why self-bias is the standard JFET arrangement. It needs a single supply and it is self-correcting: if ID tries to rise, the source voltage rises with it, making VGS more negative and pulling the current back down. That negative feedback keeps the Q point stable against the notoriously wide spread of IDSS and VP between devices of the same type number.
Hence, the required source resistance is 150 Ω.
Similar Questions
In an FET, following characteristics are given :
1. JFET is called as variable current resistor.
2. JFET is called Voltage variable resistor.
3. \(g_{d}=g_{d0}\left(1-\dfrac{V_{GS}}{V_{P}}\right)\), where gd0 is value of drain to source conductance for zero bias.
4. \(g_{d}=g_{d0}\left(1+\dfrac{V_{GS}}{V_{P}}\right)^{2}\)Which one of the following is true ?
For MOSFET, consider the following statements
A. In triode region, FET works as voltage variable resistor
B. For p-channel MOSFET, if VSG \(\gt\) |VTp|, then transistor will be in off mode
C. Amplification factor is inversly proportional to the value of VGS/Vp.
D. In saturation region, FET is used as amplifier.
E. For depletion MOSFET, channel is diffused and current flows even if VGS is zero
Choose the correct answer from the options given below :
Transfer characteristics for n-channel FET as a function of temperature T is shown in the figure
Choose the correct answer from the options given below :
When gate to source voltage of a FET changes from –5.2 volt to –5 volts, the corresponding drain current changes from 1 mA to 1.3 mA, the transconductance is
In a JFET the gate to source voltage is given as
In a JFET self-bias configuration shown below :
The drain current is
(a) \(K\dfrac{W}{L}(V_{gs}-V_{th})V_{ds}\)
(b) \(I_{DSS}\left(1-\dfrac{I_DR_S}{V_P}\right)^{2}\)
(c) \(I_{DSS}\left(1+\dfrac{I_DR_S}{V_P}\right)^{2}\)
(d) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}\)
Out of these which are correct ?
Assertion (A) : FET is a device, which depends for its operation on the control of field or voltage due to applied current.
Reason (R) : FET has a very high input resistance of the order of mega-ohms. It is also immune to radiations.
Match the following :
List - I List - II (circuit in the original question) (a) JFET VGS = 0V (i) 
(b) JFET self-bias (ii) 
(c) JFET Fixed bias (iii) 
(d) FET Low Frequencies circuit (iv) 
Codes :
Which of the following statements are valid for JFET ?
(a) \(I_{DS}=I_{DSS}\left(1-\dfrac{V_{GS}}{V_P}\right)\)
(b) \(I_{DS}=I_{DSS}\left(1+\dfrac{V_{GS}}{V_P}\right)\)
(c) \(\mu=\dfrac{g_m}{r_d}\)
(d) \(\mu=g_m\cdot r_d\)
Options :
In a certain FET circuit, VGS = 0V, VDD = 15V, IDSS = 15 mA, and RD = 470Ω. If RD is decreased to 330 Ω, IDSS is :
Important Questions from Field Effect Transistors
Which of the following is the characteristic of Field-effect transistor?
- In junction field effect transistor, the drain current can be approximated as:
The expression for the transconductance (g m) of a JFET is:
Field Effect transistor is:
A FET has
