Which of the following A/D convertor is fastest ?
Flash convertor
The flash converter is the fastest by a wide margin — option 1 — and the reason is structural rather than technological.
How a flash converter works. A resistor ladder generates every reference level simultaneously, and a bank of \(2^{n}-1\) comparators tests the input against all of them at the same instant. The resulting thermometer code passes through a priority encoder to give binary. There is no clock stepping and no iteration:
\(t_{conv}=t_{comparator}+t_{encoder}\)
one comparator delay plus one encoder delay, and that is the whole conversion.
Why the others must be slower — they all iterate.
| Type | Conversion time | Mechanism |
|---|---|---|
| Flash | 1 step | All comparisons at once |
| Successive approximation | n clock cycles | Binary search, one bit per cycle |
| Counter ramp | up to 2n cycles | Counts up until the ramp matches |
| Dual slope | up to 2 × 2n cycles | Integrates up for a fixed time, then down |
For an 8-bit converter that is 1 step against 8, 256 and about 512 — the ordering is not close.
The price of the speed. The comparator count grows exponentially: 255 comparators for 8 bits, 1023 for 10 bits. Power, die area and the input capacitance presented to the driving amplifier all scale with it, which caps practical flash converters at about 8 bits. Pipelined and folding architectures exist precisely to trade a little latency for far fewer comparators.
Why the slow ones survive. Each buys something else. Successive approximation gives a good balance of speed, resolution and cost and is the workhorse inside microcontrollers. Dual slope is the slowest of all but the most accurate: because it integrates the input over a fixed interval, noise averages out, component tolerances cancel between the two ramps, and choosing that interval as a multiple of the mains period rejects 50 Hz interference completely — which is why digital multimeters use it.
The general trade-off. Speed and resolution pull against each other in every converter architecture; flash sits at one extreme and dual slope at the other.
Hence, the fastest A/D converter is the flash converter.
Similar Questions
In successive approximation converter input to the comparator is through
Assertion (A) : Dual slope (A/D) converter is the most preferred conversion technique employed in most of the digital multimeters.
Reason (R) : Dual slope (A/D) converter provides high accuracy while at the same time suppresses the HUM effect on the input signal.
Assertion (A) : Dual-slope A/D converter is most preferred A/D conversion approach in digital multimeters.
Reason (R) : Dual-slope A/D converter provides high accuracy in A/D conversion, while at the same time suppressing the hum effect on the input signal.
A dual slope A to D converter has the following :
(a) a differentiator
(b) a comparator
(c) an integrator
(d) a binary counter
Out of above, following is correct :
For A to D converters, following statements are given :
(a) It is the process of converting time varying input to discrete output levels.
(b) Flash type A/D conversion are slow in nature.
(c) The quantisation error depends upon the step size of quantisation.
(d) Flash type A/D conversion is a simultaneous conversion.
Which of the above are correct ?
Assertion (A) : The output of an 8 bit A to D convertor is 80H for an input of 2.5V.
Reason (R) : ADC has an output range of 00 to FFH for an input range of −5V to +5V.
Select your answer using the codes given below.
The conversion time for an 8-bit successive approximation ADC which is driven by 1-MHz clock is :
An analog voltage in the range 0 to V volts is to be converted into 3 bit digital output. It is divided into eight intervals. The top and bottom intervals are \(\dfrac{V}{14}\) and the middle six intervals are \(\dfrac{V}{7}\). The maximum quantization error will be :
List – I List – II a. Flash converter i. Integrating type b. Successive approximation ii. Fastest converter c. Counter Ramp iii. Maximum conversion Time = N bits d. Dual Slope iv. Uses a DAC in its feedback patd Codes :
Important Questions from Analog To Digital Converters
Which is known as flash converter?
A 200 mV full-scale dual-slope analog to digital converter (DS-ADC) has a reference voltage of 100 mV. The first integration time is set as 100 ms. The DS-ADC is operated in the continuous conversion mode. The conversion time of the DS-ADC for an input voltage of 123.4 mV (in ms, rounded off to one decimal place) is
- The minimum number of comparators required in a 6-bit flash analog-to-digital converter is ________. (answer in integer)
- The number of comparator required for a 5 bit flash ADC is ____________.
In successive approximation converter input to the comparator is through
