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Assertion (A) : Dual-slope A/D converter is most preferred A/D conversion approach in digital multimeters.

Reason (R) : Dual-slope A/D converter provides high accuracy in A/D conversion, while at the same time suppressing the hum effect on the input signal.

This question was previously asked in
UGC NET 2023 Electronic Science Question Paper (13-Dec-2023) (Shift 1)
The correct answer is

Both (A) and (R) are correct and (R) is the correct explanation of (A)

 Both statements are true, and the reason names exactly the two properties that won the dual-slope converter its place — option 1.

How it works. The conversion has two phases. The unknown input is integrated for a fixed time \(T_{1}\); then a reference of opposite polarity is integrated until the integrator returns to zero, taking a counted time \(T_{2}\). Then

\(V_{in}=V_{ref}\dfrac{T_{2}}{T_{1}}\)

Why the accuracy is high — the components cancel. The same capacitor, the same resistor and the same clock are used in both phases, so R, C and the clock frequency all divide out of the final ratio. Their absolute values, tolerances, temperature drift and ageing become irrelevant, and the accuracy rests on the voltage reference alone. Almost no other architecture has this property: a successive-approximation converter is only as good as its internal DAC, and a flash converter only as good as its resistor ladder.

Why hum is suppressed — and this is the decisive advantage. Integrating over a time \(T_{1}\) averages the input, and the average of any sinusoid over a whole number of its own periods is exactly zero. Choosing

\(T_{1}=n\times\dfrac{1}{f_{mains}}\)

— typically 100 ms, which is five cycles of 50 Hz and six of 60 Hz — makes the converter blind to mains interference picked up on the leads. The rejection is theoretically infinite at that frequency and its harmonics. This is called normal-mode rejection, and no sampling converter can achieve it, because a sample taken at an instant captures whatever the interference happens to be doing then.

 Dual slopeSuccessive approximation
SpeedSlow — a few readings per secondFast — microseconds
Accuracy limited byThe reference aloneThe internal DAC
Hum rejectionExcellentNone inherently

The trade is entirely acceptable in a multimeter, where two or three readings a second is all a human can use, and where a steady, accurate display matters far more than speed. That is precisely why the assertion holds and why the reason explains it.

Hence, both (A) and (R) are correct and (R) is the correct explanation of (A).

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Similar Questions

  1. In successive approximation converter input to the comparator is through

  2. Assertion (A) : Dual slope (A/D) converter is the most preferred conversion technique employed in most of the digital multimeters.

    Reason (R) : Dual slope (A/D) converter provides high accuracy while at the same time suppresses the HUM effect on the input signal.

  3. A dual slope A to D converter has the following :

    (a) a differentiator

    (b) a comparator

    (c) an integrator

    (d) a binary counter

    Out of above, following is correct :

  4. For A to D converters, following statements are given :

    (a) It is the process of converting time varying input to discrete output levels.

    (b) Flash type A/D conversion are slow in nature.

    (c) The quantisation error depends upon the step size of quantisation.

    (d) Flash type A/D conversion is a simultaneous conversion.

    Which of the above are correct ?

  5. Assertion (A) : The output of an 8 bit A to D convertor is 80H for an input of 2.5V.

    Reason (R) : ADC has an output range of 00 to FFH for an input range of −5V to +5V.

    Select your answer using the codes given below.

  6. Which of the following A/D convertor is fastest ?

  7. The conversion time for an 8-bit successive approximation ADC which is driven by 1-MHz clock is :

  8. An analog voltage in the range 0 to V volts is to be converted into 3 bit digital output. It is divided into eight intervals. The top and bottom intervals are \(\dfrac{V}{14}\) and the middle six intervals are \(\dfrac{V}{7}\). The maximum quantization error will be :

  9. List – IList – II  
    a. Flash converteri. Integrating type
    b. Successive approximationii. Fastest converter
    c. Counter Rampiii. Maximum conversion Time = N bits
    d. Dual Slopeiv. Uses a DAC in its feedback patd

    Codes :


Important Questions from Analog To Digital Converters

  1. Which is known as flash converter?

  2. A 200 mV full-scale dual-slope analog to digital converter (DS-ADC) has a reference voltage of 100 mV. The first integration time is set as 100 ms. The DS-ADC is operated in the continuous conversion mode. The conversion time of the DS-ADC for an input voltage of 123.4 mV (in ms, rounded off to one decimal place) is

  3. The minimum number of comparators required in a 6-bit flash analog-to-digital converter is ________. (answer in integer)
  4. The number of comparator required for a 5 bit flash ADC is ____________.
  5. In successive approximation converter input to the comparator is through

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