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Question

Assertion (A) : The output of an 8 bit A to D convertor is 80H for an input of 2.5V.

Reason (R) : ADC has an output range of 00 to FFH for an input range of −5V to +5V.

Select your answer using the codes given below.

This question was previously asked in
UGC NET 2015 Paper 1 Question Paper (27-Dec-2015)
The correct answer is

(A) is false, but (R) is true

Take the reason as the specification and test the assertion against it.

Step 1 — find the step size. The span runs from −5 V to +5 V, a total of 10 V, divided into \(2^{8}=256\) codes:

\(\Delta=\dfrac{10}{256}=0.0390625\ \text{V}\)

Step 2 — convert 2.5 V to a code. Because the range is bipolar, the input must first be measured from the bottom of the span:

\(\text{code}=\dfrac{V_{in}-V_{min}}{\Delta}=\dfrac{2.5-(-5)}{0.0390625}=\dfrac{7.5}{0.0390625}\)

\(\text{code}=192_{10}=\text{C0H}\)

Equivalently, 2.5 V sits three quarters of the way up the −5 to +5 V span, and three quarters of 256 is 192.

Step 3 — compare with the assertion. The assertion claims 80H, which is 128 decimal — exactly half of 256, the midpoint of the range. Working backwards,

\(V_{in}=-5+128\times0.0390625=-5+5=0\ \text{V}\)

So 80H corresponds to an input of 0 V, not 2.5 V. The assertion is false.

Examine the reason on its own — true. An 8-bit converter does have 256 output codes running 00H to FFH, and −5 V to +5 V is a perfectly ordinary bipolar input range. Nothing in it is wrong.

Assemble. (A) is false and (R) is true, which is code 4.

The trap this question is built on. The error is treating the converter as if its range were unipolar. On a 0–5 V converter, 2.5 V would indeed be the half-scale point and would give 80H. Shifting the range to −5…+5 V moves the half-scale point down to 0 V, and 2.5 V becomes three-quarter scale. Whenever a bipolar range is quoted, the offset must be subtracted before scaling.

The useful reference points for this converter.

InputFraction of spanCode
−5 V000H
−2.5 V1/440H
0 V1/280H
+2.5 V3/4C0H
+5 V1FFH

Hence, (A) is false, but (R) is true.

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Similar Questions

  1. In successive approximation converter input to the comparator is through

  2. Assertion (A) : Dual slope (A/D) converter is the most preferred conversion technique employed in most of the digital multimeters.

    Reason (R) : Dual slope (A/D) converter provides high accuracy while at the same time suppresses the HUM effect on the input signal.

  3. A dual slope A to D converter has the following :

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Important Questions from Analog To Digital Converters

  1. The minimum number of comparators required in a 6-bit flash analog-to-digital converter is ________. (answer in integer)
  2. The number of comparator required for a 5 bit flash ADC is ____________.
  3. In successive approximation converter input to the comparator is through

  4. Assertion (A) : Dual slope (A/D) converter is the most preferred conversion technique employed in most of the digital multimeters.

    Reason (R) : Dual slope (A/D) converter provides high accuracy while at the same time suppresses the HUM effect on the input signal.

  5. A dual slope A to D converter has the following :

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