In MOSFET, the linear region current is : (A) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}-\dfrac{V_{ds}}{2}\right)V_{ds}\) Choose the most appropriate answer from the options given below :
(B) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}\right)V_{ds}\)
(C) \(\dfrac{\mu_{n}C_{ox}w}{2L}\left(V_{gs}-V_{th}\right)V_{ds}^{2}\)
(D) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}\right)^{2}\)
(A) and (B) Only
Statements (A) and (B) are both valid descriptions of the linear region — one exact, one approximate — option 1.
(A) is the full triode expression. Integrating the channel charge along the device gives
\(I_{D}=\dfrac{\mu_{n}C_{ox}W}{L}\left[\left(V_{gs}-V_{th}\right)-\dfrac{V_{ds}}{2}\right]V_{ds}\)
The \(V_{ds}/2\) term is there because the channel is not uniform: the gate-to-channel voltage falls from \(V_{gs}\) at the source to \(V_{gs}-V_{ds}\) at the drain, so the average inversion charge corresponds to \(V_{gs}-V_{th}-V_{ds}/2\).
(B) is the same expression for small Vds. When \(V_{ds}\ll\left(V_{gs}-V_{th}\right)\) the half-term is negligible and
\(I_{D}\approx\dfrac{\mu_{n}C_{ox}W}{L}\left(V_{gs}-V_{th}\right)V_{ds}\)
Now \(I_{D}\) is proportional to \(V_{ds}\) — the device behaves as a resistor whose value is set by the gate:
\(R_{on}=\dfrac{1}{\dfrac{\mu_{n}C_{ox}W}{L}\left(V_{gs}-V_{th}\right)}\)
This is precisely why the region is called linear, and it is the basis of the MOSFET analogue switch and of voltage-controlled attenuators.
| Statement | Verdict |
|---|---|
| (A) | ✓ Exact triode current |
| (B) | ✓ Deep-linear approximation |
| (C) | ✗ Vds squared — no such term arises |
| (D) | ✗ This is the saturation current |
Why (D) is the important distractor. It is a real and correct formula, but for the wrong region. Setting \(V_{ds}=V_{gs}-V_{th}\) in (A) — the pinch-off point where the linear region ends — gives
\(I_{D}=\dfrac{\mu_{n}C_{ox}W}{2L}\left(V_{gs}-V_{th}\right)^{2}\)
which is the saturation current, and note the factor \(1/2\) that statement (D) omits. Beyond pinch-off the current stops depending on \(V_{ds}\) altogether, since the channel is pinched at the drain end and any extra drain voltage is dropped across that depleted region rather than along the channel.
The two regions in one sentence : below pinch-off the MOSFET is a gate-controlled resistor, above it a gate-controlled current source.
Hence, the correct statements are (A) and (B).
Similar Questions
The threshold voltage of an n-channel MOSFET can be increased by
Assertion (A) : MOS ICs based on MOSFET structure find wide applications in digital field.
Reason (R) : MOS ICs have small size and are easy to fabricate.
Approximate oxide capacitance value (Cgd) for saturation operating mode of MOS transistor is:
For an n-channel MOS transistor with $\mu_n$ = 600 cm2/Vs, Cox = 7 x 10-8 F/cm2, W = 40 $\mu_m$, L = 4$\mu_m$ and VTO=1.0 V, the value of K parameter is:
In MOS
A. The substrate fermi potential ϕF is negative in NMOS
B. The substrate fermi potential ϕF is positive in NMOS
C. The substrate bias voltage VSB is positive in NMOS, negative in PMOS
D. The substrate bias voltage VSB is negative in NMOS, positive in PMOS.
Choose the correct answer from the options given below:
In enhancement mode MOSFET the saturation (drain) current is given by
(a) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}\)
(b) \(K\dfrac{W}{L}(V_{gs}-V_{th})(1+\lambda V_{ds})\)
(c) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}(1+\lambda V_{ds})\)
(d) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}(1-\lambda V_{ds})\)
Out of these
In a MOSFET the drain saturation current is
For the n-channel MOSFET shown in the figure given below, threshold voltage Vth = 2 V. The drain current ID of the MOSFET is 4 mA when the drain resistance RD is 1 kΩ. If the value of RD is increased to 4 kΩ, then the drain current ID will become :
The threshold voltage of a MOSFET can be lowered by
1. using a thinner gate oxide
2. reducing the carrier concentration in the substrate
3. increasing the carrier concentration in the substrateOf these statements :
The threshold voltage of an n-channel MOSFET can be increased by
Important Questions from MOSFET
An n-channel MOSFET is connected as shown in the Figure.
Assume $V_{TH} = 1\text{ V}$, $V_{DD} = 5\text{ V}$, and $\mu C_{ox}\left(\frac{W}{L}\right) = 2\text{ mA V}^{-2}$ and neglect channel length modulation effects.
The gate voltage ($V_G$) of the n-channel MOSFET (in Volt) is __.
(rounded off to two decimal places)
- A semiconductor uses P-type substrates with $N_A = 5 \times 10^{15}cm^{-3}$ in an n-MOS device having depletion region width of 0.415 $\mu$m. What is the depletion charge in magnitude?
- MOSFETs exhibit a non-linear relationship between input voltage and output current due to the device construction. The non-linear relationship is connected through the device parameter 'K'. Calculate 'K' for a specific MOSFET operating with an input voltage of 6 V and output current of 10 mA. The Threshold voltage of the chosen MOSFET is 4 V.
- Given below are two statements: one is labelled as Assertion (a) and the other is labelled as Reason (r).
Assertion (a): In a ratioless logic, the transistors can be of minimum size.
Reason (r): In a ratioless logic, the logic levels are not dependent upon the relative device size. - What are the effects of increasing temperature in the I-V characteristics of the NMOS transistor ?
