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Question

Assertion (A) : MOS ICs based on MOSFET structure find wide applications in digital field.

Reason (R) : MOS ICs have small size and are easy to fabricate.

This question was previously asked in
UGC NET 2014 Paper 2 History Question Paper (28-Dec-2014)
The correct answer is

Both (A) and (R) are true and (R) is the correct explanation of (A).

 Both statements are true, and small size together with process simplicity is exactly why MOS took over digital electronics — option 1.

The size argument. A MOSFET is a self-isolating device: the reverse-biased source and drain junctions keep neighbouring transistors apart, so no separate isolation structure is needed. A bipolar transistor in an integrated circuit requires isolation diffusions or trenches occupying substantial area around every device. The result is that a MOS gate occupies a small fraction of the area of its bipolar equivalent, and packing density — the number of functions per chip — is what a digital process is judged on.

The fabrication argument. A basic NMOS process needs far fewer masking and diffusion steps than a bipolar one, and MOSFETs need no resistors: a transistor itself serves as the load, and in CMOS the complementary device does the job. Every step removed raises yield, and yield decides cost. Fewer steps also means fewer opportunities for misalignment, which is what allows the geometry to be shrunk in the first place.

 MOSBipolar
IsolationSelf-isolating junctionsSeparate structures needed
Area per gateSmallLarge
Process stepsFewerMore
Static power (CMOS)≈ ZeroMilliwatts per gate

A third reason the assertion does not mention is arguably the decisive one, and it reinforces rather than contradicts the reason given: CMOS dissipates essentially no power when idle, because in either logic state one transistor of the complementary pair is off and no DC path exists from supply to ground. Power is consumed only in switching, \(P=fCV^{2}\). Without that property, packing millions of gates onto one die would be impossible whatever their size — the heat could not be removed.

What MOS gave up was speed, and for a time that kept bipolar ECL in the fastest machines. Scaling eventually removed even that disadvantage, since a smaller MOSFET is also a faster one — the same shrink that improves density improves speed, which is the reason the industry has pursued it for fifty years.

Hence, both (A) and (R) are true and (R) is the correct explanation of (A).

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Similar Questions

  1. In enhancement mode MOSFET the saturation (drain) current is given by

    (a) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}\)

    (b) \(K\dfrac{W}{L}(V_{gs}-V_{th})(1+\lambda V_{ds})\)

    (c) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}(1+\lambda V_{ds})\)

    (d) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}(1-\lambda V_{ds})\)

    Out of these

  2. For an n-channel MOS transistor with $\mu_n$ = 600 cm2/Vs, Cox = 7 x 10-8  F/cm2, W = 40 $\mu_m$, L = 4$\mu_m$ and VTO=1.0 V, the value of K parameter is:

  3. Approximate oxide capacitance value (Cgd) for saturation operating mode of MOS transistor is:

  4. In MOS

    A. The substrate fermi potential ϕF is negative in NMOS

    B. The substrate fermi potential ϕF is positive in NMOS

    C. The substrate bias voltage VSB is positive in NMOS, negative in PMOS

    D. The substrate bias voltage VSB is negative in NMOS, positive in PMOS.

    Choose the correct answer from the options given below:

  5. In a MOSFET the drain saturation current is

  6. The threshold voltage of a MOSFET can be lowered by

    1. using a thinner gate oxide
    2. reducing the carrier concentration in the substrate
    3. increasing the carrier concentration in the substrate

    Of these statements :

  7. The threshold voltage of an n-channel MOSFET can be increased by

  8. The threshold voltage of an n-channel MOSFET can be increased by

  9. In MOSFET, the carrier velocity between constant mobility regime and the saturation velocity can be described as :

  10. In MOSFET, the linear region current is :

    (A) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}-\dfrac{V_{ds}}{2}\right)V_{ds}\)
    (B) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}\right)V_{ds}\)
    (C) \(\dfrac{\mu_{n}C_{ox}w}{2L}\left(V_{gs}-V_{th}\right)V_{ds}^{2}\)
    (D) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}\right)^{2}\)

    Choose the most appropriate answer from the options given below :


Important Questions from MOSFET

  1. Which industry does aluminium smelting belong to?

  2. Given, Vgs is the gate-source voltage, Vds is the drain source voltage, and Vth is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are

  3. A switched mode power supply operating at 20 kHz to 100 kHz range uses as the main switching element is __________.

  4. Which semiconductor power device out of the following, is not a current triggering device?

  5. A CMOS amplifier when compared to an N–channel MOSFET, has the advantage of

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