Approximate oxide capacitance value (Cgd) for saturation operating mode of MOS transistor is:
Cox W.LD
What Cgd is made of. The gate-to-drain capacitance of a MOSFET has two possible contributions: a share of the channel capacitance CoxWL, and the fixed overlap capacitance produced where the gate electrode overlaps the drain diffusion by a length LD:
\(C_{overlap} = C_{ox}\,W\,L_D\)
What saturation does to the channel. In saturation the drain end of the channel is pinched off: the inversion layer no longer reaches the drain, because \(V_{GD} \lt V_{TO}\). With no conducting channel touching the drain, the gate has no capacitive coupling to the drain through the channel at all — the channel charge is shared roughly two-thirds to the source and none to the drain.
So in saturation the only path left is the overlap:
\(C_{gd} \approx C_{ox}\,W\,L_D\)
Compare with the other regions — this is what makes the answer easy to place:
| Region | Cgd (approximate) |
|---|---|
| Cut-off | CoxWLD (overlap only, no channel) |
| Linear / triode | \(\tfrac{1}{2}C_{ox}WL + C_{ox}WL_D\) (channel splits equally between source and drain) |
| Saturation | CoxWLD |
That table also identifies the distractors: option 4 is the linear-region value and option 2 is the full channel-oxide capacitance CoxWL, which is the total gate capacitance, not the gate-drain part. Zero would be true only if the overlap were ignored altogether.
Why it matters. Small as it is, this overlap Cgd is the feedback path from output to input of a common-source stage, so the Miller effect multiplies it by the stage gain and it dominates the high-frequency response.
Hence, in saturation Cgd ≈ CoxW·LD.
Similar Questions
In enhancement mode MOSFET the saturation (drain) current is given by
(a) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}\)
(b) \(K\dfrac{W}{L}(V_{gs}-V_{th})(1+\lambda V_{ds})\)
(c) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}(1+\lambda V_{ds})\)
(d) \(K\dfrac{W}{L}(V_{gs}-V_{th})^{2}(1-\lambda V_{ds})\)
Out of these
For an n-channel MOS transistor with $\mu_n$ = 600 cm2/Vs, Cox = 7 x 10-8 F/cm2, W = 40 $\mu_m$, L = 4$\mu_m$ and VTO=1.0 V, the value of K parameter is:
In MOS
A. The substrate fermi potential ϕF is negative in NMOS
B. The substrate fermi potential ϕF is positive in NMOS
C. The substrate bias voltage VSB is positive in NMOS, negative in PMOS
D. The substrate bias voltage VSB is negative in NMOS, positive in PMOS.
Choose the correct answer from the options given below:
In a MOSFET the drain saturation current is
The threshold voltage of a MOSFET can be lowered by
1. using a thinner gate oxide
2. reducing the carrier concentration in the substrate
3. increasing the carrier concentration in the substrateOf these statements :
The threshold voltage of an n-channel MOSFET can be increased by
The threshold voltage of an n-channel MOSFET can be increased by
Assertion (A) : MOS ICs based on MOSFET structure find wide applications in digital field.
Reason (R) : MOS ICs have small size and are easy to fabricate.
In MOSFET, the carrier velocity between constant mobility regime and the saturation velocity can be described as :
In MOSFET, the linear region current is :
(A) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}-\dfrac{V_{ds}}{2}\right)V_{ds}\)
(B) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}\right)V_{ds}\)
(C) \(\dfrac{\mu_{n}C_{ox}w}{2L}\left(V_{gs}-V_{th}\right)V_{ds}^{2}\)
(D) \(\dfrac{\mu_{n}C_{ox}w}{L}\left(V_{gs}-V_{th}\right)^{2}\)Choose the most appropriate answer from the options given below :
Important Questions from MOSFET
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