Flip Flop can be used to make : (a) Latches (b) Bounce-elimination switches (c) ADDER (d) Encoder Which of the statements given above are correct ?
(a) and (b) only
The dividing line is memory. A flip-flop is a one-bit storage element, so it can only build things that need to remember. Sort the four candidates on that test and the answer follows at once.
| Item | Needs memory? | Built from a flip-flop? |
|---|---|---|
| (a) Latch | Yes | Yes |
| (b) Bounce-elimination switch | Yes | Yes |
| (c) Adder | No | No — combinational |
| (d) Encoder | No | No — combinational |
So (a) and (b), which is option 1.
(a) Latches. The latch is the flip-flop's own ancestor: two cross-coupled NOR or NAND gates form an SR latch that holds one bit indefinitely. A flip-flop is the same structure with clocking added, so the two are intimately related — a D flip-flop is literally a pair of D latches in a master-slave arrangement.
(b) Bounce-elimination switches, and why memory is essential here. A mechanical contact does not close cleanly; it chatters for several milliseconds, which a fast logic gate reads as a burst of pulses. A single-pole double-throw switch feeding an SR latch cures it completely: the first contact sets the latch, and all subsequent bounces on that same terminal find the latch already in that state and change nothing. The output is one clean transition. No combinational circuit can do this, because it has no way of knowing that the first edge has already been seen.
Why (c) and (d) cannot be right. An adder's output depends only on its present inputs — the same A, B and carry-in always give the same sum, with no history involved. So it is built from XOR and AND gates alone. An encoder likewise maps an active input line to a binary code by pure combinational logic. Neither has any state to store.
The one caveat worth noting. A serial adder does contain a flip-flop — but only to hold the carry between successive bit times, which is a storage function bolted onto a combinational full adder. The adder proper remains combinational.
What flip-flops actually build. Registers, shift registers, counters, frequency dividers, sequence detectors and the state memory of every finite state machine — the sequential half of digital design.
Hence, the correct statements are (a) and (b).
Similar Questions
The truth table of D flip-flop is given below:
C D Qn+1 O X Qn (Last State) $\uparrow$ 0 0 $\uparrow$ 1 1 Choose exact characteristic equation based on above Truth Table
Assertion (A) : Delay flip flop is used to store a single bit either 0 or 1.
Reason (R) : It has only one input, when clock is high and D input is also high, the output resets.
Assertion (A) : Asynchronous sequential circuit is also called event driven circuit.
Reason (R) : Event driven circuit does not have clock to trigger change of state. The states are changed by the change in input signal of the previous stage.
Select your answer using the codes given below.
For the circuit shown below consider the two statements :
Assertion (A) : The circuit is sequential.
Reason (R) : There is a loop in circuit.
Select your answer using the codes given below.
Under which input condition, the J-K Flip-Flop toggles ?
Read the following statements :
(a) In a J-K Flip Flop, if J = K, the resulting Flip Flop is referred to as a T-type Flip Flop
(b) In a J-K Flip Flop, if J ≠ K, the resulting Flip Flop is referred to as a D-type Flip Flop
(c) An S-R Flip Flop cannot be converted into a T-type Flip Flop since S = R = 1 is not allowed.Which is correct ?
Which of the following statements are true regarding the operation of JK flip-flop ?
1. When K input is low and J input is high, the Q output of the flip flop is reset.
2. When K input is high and J input is low, the output Q of the flip flop is set.
3. When both the inputs K and J are low, the output Q does not change.
4. When both the inputs K and J are high it is possible to set or reset the flip-flop (ie) the output toggle on next positive clock edge.Which one of the following is true ?
Assertion (A) : D-flip-flops are used as buffer register.
Reason (R) : Flip-flops are free from "race-around" condition.
Select your answer using the codes given below :
In the circuit shown below, the output Y1 and Y2 for the given initial condition Y1 = Y2 = 1 and after four input pulses will be
Read the following statements :
i. Gate is a combinational logic.
ii. JK Flip-flop in toggle mode is not combinational logic.
iii. MSJK FF suffers from race-around.
iv. Counters are sequential circuits.Which is correct ?
Important Questions from Sequential Circuits
A basic memory storage element in a digital system is:
The basic sequential logic building block in which the output follows the data input as long as the ENABLE input is active, is
What can be the maximum clock frequency of a 10-bit ripple counter which will not cause a count to skip, considering 10 ns propagation delay for each of the edge-triggered flip flops?
The output of a sequential circuit depends on
The basic building block of a sequential logic circuit is
