The ALE line of an 8085 microprocessor is used to
latch the 8 bits of address lines AD7-AD0 into an external latch.
The problem ALE solves. The 8085 needs 16 address lines but has only 40 pins, so the designers multiplexed the lower half: the pins AD0–AD7 carry the low byte of the address during the first clock state of a machine cycle (T1) and then switch to carrying data for the rest of it. The upper byte A8–A15 has dedicated pins and stays valid throughout.
What ALE does. ALE (Address Latch Enable) goes high during T1 and falls at its end. That falling edge is used to strobe an external latch — classically a 74LS373 — which captures the low address byte before the pins change over to data:
\(AD_7\text{-}AD_0 \xrightarrow{\ \text{ALE latch}\ } A_7\text{-}A_0\)
The memory or I/O device then sees a stable, complete 16-bit address for the whole machine cycle, while the processor uses the same eight pins to transfer the data byte.
Why the other options are wrong.
Latching the output of an I/O instruction is done by the device's own chip-select and the \(\overline{WR}\) strobe, not by ALE.
Chip selects are generated by an address decoder from A15–A8 together with IO/\(\overline{M}\); ALE plays no part in enabling or disabling them.
The state of the TRAP interrupt is read with the RIM instruction; ALE has nothing to do with interrupts.
Related signals worth knowing together: IO/\(\overline{M}\) distinguishes memory from I/O, \(\overline{RD}\) and \(\overline{WR}\) time the transfer, and S0, S1 identify the machine cycle. ALE is issued once per machine cycle, so counting ALE pulses is a standard way to count machine cycles on a logic analyser.
Hence, ALE is used to latch the 8 bits of address lines AD7–AD0 into an external latch.
Similar Questions
In an 8086, AL = 19 BCD & BL = 36 BCD prior to execution of following example
ADD AL, BL
DAA
What will be content of AL after execution of the example ?
If SS = 3000 H and SP = 2000 H in 8086 microprocessor, in which memory addresses the contents of BL and BH are stored respectively, when PUSH BX instruction is executed.
The BIU of 8086 contains 16 bit segment registers. What is the width of address sent out by BIU of 8086 miocroprocessor?
Loop 1 : MOV A, P1
MOV P2, A
JNB P3.3, Loop1
The program does the following
In 8051 micro controller
A. INT0 and INT1 pins are normally low
B. Timer1 Interrupt Flag is auto cleared after occurrence
C. Serial interrupt is auto cleared after occurrence
D. Timer 0 Vector location is 000B H
Choose the correct answer from the options given below:
In 8086
A. The stack memory is a FIFO (First In First Out)
B. The JMP instruction cannot be prefixed with segment override prefix
C. SAHF and POPF instructions affect the flag register
D. DAS instruction cannot be used for 8 bit operations.
Choose the correct answer from the options given below :
In 8051
A. INT0 and INT1 can be made edge triggered by programming TCON
B. On reset serial communication interrupts has highest priority
C. Upon reset all interrupts are enabled
D. Only one interrupt is set aside for serial communication.
Choose the correct answer from the options given below:
Match List I with List II in 8086 Micro processor
LIST I LIST II A. Direct memory addressing data memory I. MOV [SI], 2500 H B. Immediate Addressing II. PUSHF C. Flag Manipulation III. RET D. Control transfer IV. MOV BX, [2000 H] Choose the correct answer from the options given below:
Arrange following interrupts in order of polling (checking interrupt conditions) after every instructions.
A. Serial Interrupt
B. External 1 Interrupt
C. Timer 1 Interrupt
D. External 0 Interrupt
Choose the correct answer from the options given below :
Given below are two statements : one is labelled as Assertion A and the other is labelled as Reason R
Assertion A : Some instruction read the contents of an internal port latch instead of reading the status of an external pin.
Reason R : We must not make a distinction between reading the status of the input pin and internal latch of the output port.
In the light of the above statements, choose the most appropriate answer from the options given below :
Important Questions from Microprocessors
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin
Description
a. D 0-D 7
1. Reset Input
b. RESET
2. Data Lines
c. A 0,A 1
3. Internal Address
