The BIU of 8086 contains 16 bit segment registers. What is the width of address sent out by BIU of 8086 miocroprocessor?
20 bit
The given question is about the BIU (Bus Interface Unit) of the 8086 microprocessor, and it asks about the width of the address sent out by the BIU.
The 8086 microprocessor is a 16-bit microprocessor with a segmented memory architecture. This architecture involves using segment registers, which are 16-bit registers. These segment registers are combined with a 16-bit offset to form a 20-bit physical address. Let's understand how this is done:
To clarify, here's an example:
The key point here is that this method allows the 8086 to address up to 1 MB of memory using a 20-bit address despite having 16-bit segment registers and offsets.
Therefore, the correct answer is that the width of the address sent out by the BIU of 8086 is 20 bit.
Conclusion: The BIU of the 8086 microprocessor uses a 20-bit address bus, allowing it to address 1 MB of memory, which is a significant feature of this microprocessor.
In an 8086, AL = 19 BCD & BL = 36 BCD prior to execution of following example
ADD AL, BL
DAA
What will be content of AL after execution of the example ?
If SS = 3000 H and SP = 2000 H in 8086 microprocessor, in which memory addresses the contents of BL and BH are stored respectively, when PUSH BX instruction is executed.
Loop 1 : MOV A, P1
MOV P2, A
JNB P3.3, Loop1
The program does the following
In 8051 micro controller
A. INT0 and INT1 pins are normally low
B. Timer1 Interrupt Flag is auto cleared after occurrence
C. Serial interrupt is auto cleared after occurrence
D. Timer 0 Vector location is 000B H
Choose the correct answer from the options given below:
In 8086
A. The stack memory is a FIFO (First In First Out)
B. The JMP instruction cannot be prefixed with segment override prefix
C. SAHF and POPF instructions affect the flag register
D. DAS instruction cannot be used for 8 bit operations.
Choose the correct answer from the options given below :
In 8051
A. INT0 and INT1 can be made edge triggered by programming TCON
B. On reset serial communication interrupts has highest priority
C. Upon reset all interrupts are enabled
D. Only one interrupt is set aside for serial communication.
Choose the correct answer from the options given below:
Match List I with List II in 8086 Micro processor
| LIST I | LIST II |
| A. Direct memory addressing data memory | I. MOV [SI], 2500 H |
| B. Immediate Addressing | II. PUSHF |
| C. Flag Manipulation | III. RET |
| D. Control transfer | IV. MOV BX, [2000 H] |
Choose the correct answer from the options given below:
Arrange following interrupts in order of polling (checking interrupt conditions) after every instructions.
A. Serial Interrupt
B. External 1 Interrupt
C. Timer 1 Interrupt
D. External 0 Interrupt
Choose the correct answer from the options given below :
Given below are two statements : one is labelled as Assertion A and the other is labelled as Reason R
Assertion A : Some instruction read the contents of an internal port latch instead of reading the status of an external pin.
Reason R : We must not make a distinction between reading the status of the input pin and internal latch of the output port.
In the light of the above statements, choose the most appropriate answer from the options given below :
The ALE line of an 8085 microprocessor is used to
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin | Description |
a. D 0-D 7 | 1. Reset Input |
b. RESET | 2. Data Lines |
c. A 0,A 1 | 3. Internal Address |