In 8051 A. INT0 and INT1 can be made edge triggered by programming TCON B. On reset serial communication interrupts has highest priority C. Upon reset all interrupts are enabled D. Only one interrupt is set aside for serial communication. Choose the correct answer from the options given below:
A and D only
A — "INT0 and INT1 can be made edge triggered by programming TCON." TRUE. The two low-order bits of the TCON register choose the trigger style:
\(\texttt{IT0 (TCON.0)},\ \texttt{IT1 (TCON.2)} = 1 \Rightarrow \text{falling-edge triggered}\)
with 0 giving level-triggered operation (the default after reset). Edge triggering is usually preferred because a level-triggered request must be removed by the external device before the ISR returns, or the interrupt fires again.
B — "On reset the serial interrupt has highest priority." FALSE. After reset the priority order runs top to bottom exactly as the vector table does:
External INT0 > Timer 0 > External INT1 > Timer 1 > Serial (lowest)
So the serial interrupt has the lowest default priority. It can be promoted by setting its bit in the IP (Interrupt Priority) register, which gives it high priority within a two-level scheme.
C — "Upon reset all interrupts are enabled." FALSE. Reset clears the IE register, so every interrupt is disabled. Software must first enable the individual source and then set the global enable bit EA:
\(\texttt{MOV IE,\#82H} \Rightarrow EA=1,\ ET0=1\ (\text{Timer 0 enabled})\)
D — "Only one interrupt is set aside for serial communication." TRUE. The 8051 has a single serial interrupt at vector 0023H shared by both the receive flag RI and the transmit flag TI — which is precisely why the ISR must poll the two flags to discover which event occurred, and clear the right one by hand.
Summary of the 8051's five interrupts: two external (INT0, INT1), two timer (T0, T1) and one serial — six vectors in all if reset is counted.
Hence, the correct statements are A and D only.
| $D_7$ | $D_6$ | $D_5$ | $D_4$ | $D_3$ | $D_2$ | $D_1$ | $D_0$ |
In 8255 programmable peripheral interface device, if the port A and port B are to be set in a hand shake mode along with port C, what are the bits in the 8 bit control word to be set as 0 1 0.
The number system for the machine code of the microprocessor 8085 is
Which of the options in a multipurpose instruction used to implement the interrupt of 8085 and serial data input ?
Both 8155 and 8255 programmable peripheral interface ICs have the following common features :
(i) Programmable I/Os
(ii) Either port A or Port B can be set as either input or output ports.
(iii) One 14-bit down counter
(iv) AD0 – AD7 are multiplexed address/datalines.
Each instruction in an assembly program has the following fields :
(i) Lable field
(ii) Operand field
(iii) Comment field
(iv) Mnemonic field
Please write the proper sequence of fields :
The mnemonic of 8085 processor indicate :
| List – I | List – II |
| a. RLC | i. Rotate Accumulator Right through carry |
| b. RRC | ii. Rotate Accumulator Left through carry |
| c. RAR | iii. Rotate Accumulator Left |
| d. RAL | iv. Rotate Accumulator Right |
Codes :
Match the following :
| List – I (Pin terminals) | List – II (Applications) |
| a. SID, SOD | i. Wait state |
| b. READY | ii. Serial data transfer |
| c. TRAP | iii. Address Latch Control |
| d. ALE | iv. Interrupt |
Codes :
Assertion (A) : In serial communication system, when the transmission of data goes in both ways, it is called full-duplex system. Now if two micro processors are connected in full duplex mode, the amount of data transmitted will be double to the amount of data in half-duplex mode connection.
Reason (R) : When the transmission of data goes in one way, it is called half-duplex system and when the data moves in both ways, it is called full duplex system.
The assembler directive used to give name to some value or symbol for 8086 ASM-86 is
Which of the following peripherals provide I/O facilities ?
i. 8279
ii. 8155
iii. 8259
iv. 8255
An 8086 address bus is a/an _____ -bit bus
Match the columns.
Pin | Description |
a. D 0-D 7 | 1. Reset Input |
b. RESET | 2. Data Lines |
c. A 0,A 1 | 3. Internal Address |
An 8 bit microcontroller has an external RAM with the memory map from 8000 H to 9FFF H. How many number of bytes can this RAM store?
In 8085 microprocessor, initially the number decimal 8 is stored. If instruction RAL is executed twice on this number, the final number stored will be
Which of the following 8085 microprocessor instructions occupies 3 bytes in memory?