Given below are two statements : Statement I : In 8051 micro-controller register banks and stack reserves 32 bytes from locations 00 to 1F Hex Statement II : Bit-Addressable RAM locations are 20 H to 2 F H. In the light of the above statements, choose the most appropriate answer from the options given below :
Both Statement I and Statement II are correct
Map of the 8051's 128 bytes of internal RAM (00H–7FH).
| Addresses | Size | Purpose |
|---|---|---|
| 00H – 1FH | 32 bytes | Four register banks (Bank 0–3), 8 bytes each (R0–R7) |
| 20H – 2FH | 16 bytes | Bit-addressable area (128 individually addressable bits) |
| 30H – 7FH | 80 bytes | General-purpose scratchpad RAM |
Statement I — "Register banks and stack reserve 32 bytes from 00 to 1F Hex." TRUE. The lowest 32 bytes hold the four register banks, selected by the RS1/RS0 bits of the PSW; only one bank is active at a time, which makes context switching during an interrupt very fast. After reset the stack pointer is initialised to 07H, so the stack starts growing upward from 08H — that is, into Bank 1. This is why programmers who use more than one register bank immediately relocate the stack with an instruction such as \(\texttt{MOV SP,\#30H}\).
Statement II — "Bit-addressable RAM locations are 20H to 2FH." TRUE. These 16 bytes give 16 × 8 = 128 individually addressable bits, numbered with bit addresses 00H to 7FH. A single bit can be set, cleared, complemented or tested directly:
\(\texttt{SETB 05H}, \quad \texttt{CLR 7FH}, \quad \texttt{JB 20H, LABEL}\)
This bit-level addressing is what makes the 8051 so convenient for control applications — individual flags and I/O bits are manipulated without read–modify–write on a whole byte. (Some SFRs, including the ports, ACC, PSW and TCON, are also bit addressable, at addresses 80H and above.)
Both descriptions of the memory map are accurate.
Hence, both Statement I and Statement II are correct.
Similar Questions
In an 8086, AL = 19 BCD & BL = 36 BCD prior to execution of following example
ADD AL, BL
DAA
What will be content of AL after execution of the example ?
If SS = 3000 H and SP = 2000 H in 8086 microprocessor, in which memory addresses the contents of BL and BH are stored respectively, when PUSH BX instruction is executed.
The BIU of 8086 contains 16 bit segment registers. What is the width of address sent out by BIU of 8086 miocroprocessor?
Loop 1 : MOV A, P1
MOV P2, A
JNB P3.3, Loop1
The program does the following
In 8051 micro controller
A. INT0 and INT1 pins are normally low
B. Timer1 Interrupt Flag is auto cleared after occurrence
C. Serial interrupt is auto cleared after occurrence
D. Timer 0 Vector location is 000B H
Choose the correct answer from the options given below:
In 8086
A. The stack memory is a FIFO (First In First Out)
B. The JMP instruction cannot be prefixed with segment override prefix
C. SAHF and POPF instructions affect the flag register
D. DAS instruction cannot be used for 8 bit operations.
Choose the correct answer from the options given below :
In 8051
A. INT0 and INT1 can be made edge triggered by programming TCON
B. On reset serial communication interrupts has highest priority
C. Upon reset all interrupts are enabled
D. Only one interrupt is set aside for serial communication.
Choose the correct answer from the options given below:
Match List I with List II in 8086 Micro processor
LIST I LIST II A. Direct memory addressing data memory I. MOV [SI], 2500 H B. Immediate Addressing II. PUSHF C. Flag Manipulation III. RET D. Control transfer IV. MOV BX, [2000 H] Choose the correct answer from the options given below:
Arrange following interrupts in order of polling (checking interrupt conditions) after every instructions.
A. Serial Interrupt
B. External 1 Interrupt
C. Timer 1 Interrupt
D. External 0 Interrupt
Choose the correct answer from the options given below :
Given below are two statements : one is labelled as Assertion A and the other is labelled as Reason R
Assertion A : Some instruction read the contents of an internal port latch instead of reading the status of an external pin.
Reason R : We must not make a distinction between reading the status of the input pin and internal latch of the output port.
In the light of the above statements, choose the most appropriate answer from the options given below :
Important Questions from Microprocessors
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin
Description
a. D 0-D 7
1. Reset Input
b. RESET
2. Data Lines
c. A 0,A 1
3. Internal Address
