The following 8051 assembly program is given. Answer the questions based on it.Line No. Mnemonics 1 MOV SP, #4F H 2 SET B PSW.3 3 MOV R0, #25H 4 MOV R1, #0AH 5 MOV R2, #06H 6 PUSH 8 7 PUSH 9 8 PUSH 0AH . . . V V 20 POP 8
Specify the content of register R0 after the recention of line 20 (POP 8)
06H
How the 8051 stack unwinds. The stack is LIFO — last in, first out. A POP reverses a PUSH: it reads the byte at the address currently in SP, writes it to the destination, and then decrements SP.
State of the stack before the POP. With bank 1 selected (R0 → 08H, R1 → 09H, R2 → 0AH holding 25H, 0AH and 06H respectively), the three pushes have filled the stack as:
| Address | Contents | Pushed by |
|---|---|---|
| 50H | 25H | PUSH 8 (byte at 08H) |
| 51H | 0AH | PUSH 9 (byte at 09H) |
| 52H | 06H | PUSH 0AH (byte at 0AH) ← top, SP = 52H |
Execute POP 8. The destination operand 8 is the direct address 08H, which with bank 1 active is register R0. The instruction takes the byte at the top of the stack — 06H at address 52H — writes it into 08H, and decrements SP to 51H. Therefore
\(R0 = 06H\)
The point being tested. R0 originally held 25H, and 25H is still sitting at the bottom of this group of pushes (50H). Because the stack is LIFO, the first POP returns the last value pushed, not the value that R0 started with. Restoring registers correctly therefore requires the POPs to be written in the exact reverse order of the PUSHes — pop 0AH, then 9, then 8 — otherwise the register contents are swapped, which is a classic bug in interrupt service routines.
Distractors. 0AH would be the result of the second pop, 25H of the third, and 4FH is the initial SP value, which is never a data byte.
Hence, after line 20 (POP 8) register R0 contains 06H.
A microprocessor is a semiconductor chip fabricated with entire central processing unit (CPU) on it. It is a programmable device that accepts binary data from an input device, processes the data according to the instructions stored in the memory and provides results as output. Basically microprocessor performs two functions - (a) Fetches an instruction from the memory and (b) Performs the operation specified by the instruction. There are special inputs to the microprocessor called interrupts. External devices use these interrupts to get the microprocessor attention. A micro computer can be built by using 8085 microprocessor along with many other chips such as 8155, 8255, 8279, 8253, 8257, 8259, 8251 etc. 8085 microprocessor is 8-bit microprocessor which has 8-bit data registers where as 8086 is a 16-bit microprocessor.
The following 8051 assembly program is given. Answer the questions based on it.
| Line No. | Mnemonics |
| 1 | MOV SP, #4F H |
| 2 | SET B PSW.3 |
| 3 | MOV R0, #25H |
| 4 | MOV R1, #0AH |
| 5 | MOV R2, #06H |
| 6 | PUSH 8 |
| 7 | PUSH 9 |
| 8 | PUSH 0AH |
| . | |
| . | |
| . | |
| V | V |
| 20 | POP 8 |
| $D_7$ | $D_6$ | $D_5$ | $D_4$ | $D_3$ | $D_2$ | $D_1$ | $D_0$ |
In 8255 programmable peripheral interface device, if the port A and port B are to be set in a hand shake mode along with port C, what are the bits in the 8 bit control word to be set as 0 1 0.
The number system for the machine code of the microprocessor 8085 is
Which of the options in a multipurpose instruction used to implement the interrupt of 8085 and serial data input ?
Both 8155 and 8255 programmable peripheral interface ICs have the following common features :
(i) Programmable I/Os
(ii) Either port A or Port B can be set as either input or output ports.
(iii) One 14-bit down counter
(iv) AD0 – AD7 are multiplexed address/datalines.
Each instruction in an assembly program has the following fields :
(i) Lable field
(ii) Operand field
(iii) Comment field
(iv) Mnemonic field
Please write the proper sequence of fields :
The mnemonic of 8085 processor indicate :
| List – I | List – II |
| a. RLC | i. Rotate Accumulator Right through carry |
| b. RRC | ii. Rotate Accumulator Left through carry |
| c. RAR | iii. Rotate Accumulator Left |
| d. RAL | iv. Rotate Accumulator Right |
Codes :
Match the following :
| List – I (Pin terminals) | List – II (Applications) |
| a. SID, SOD | i. Wait state |
| b. READY | ii. Serial data transfer |
| c. TRAP | iii. Address Latch Control |
| d. ALE | iv. Interrupt |
Codes :
Assertion (A) : In serial communication system, when the transmission of data goes in both ways, it is called full-duplex system. Now if two micro processors are connected in full duplex mode, the amount of data transmitted will be double to the amount of data in half-duplex mode connection.
Reason (R) : When the transmission of data goes in one way, it is called half-duplex system and when the data moves in both ways, it is called full duplex system.
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin | Description |
a. D 0-D 7 | 1. Reset Input |
b. RESET | 2. Data Lines |
c. A 0,A 1 | 3. Internal Address |