Match List I with List II Choose the correct answer from the options given below:LIST I (instruction of 8051 microcontroller) LIST II (Addressing mode) A. MOV A, # 32 H I. Register addressing mode B. MOV R 6, A II. Register Indirect addressing mode C. MOV R4, 7 FH III. Immediate Addressing mode D. MOV A, @ RO IV. Direct Addresing mode
A-III, B-I, C-IV, D-II
How to read an 8051 addressing mode. The mode is decided entirely by the form of the operand: a "#" means the value itself, a plain register name means the register, a bare hex address means the location, and "@" means the register holds a pointer.
A → III, immediate. MOV A, #32H — the "#" marks 32H as a constant carried inside the instruction itself, loaded straight into A. Without the "#" the meaning changes completely (see C). This is a 2-byte instruction, the second byte being the data.
B → I, register. MOV R6, A — both operands are CPU registers of the current bank, so the transfer happens entirely inside the CPU. Register addressing is the fastest mode (1 byte, 1 machine cycle) because no memory access is needed. The 8051 has four banks of R0–R7, selected by RS1/RS0 in the PSW.
C → IV, direct. MOV R4, 7FH — 7FH here is not data but an address: the contents of internal RAM location 7FH are copied into R4. Direct addressing can reach the lower 128 bytes of RAM and the SFR area (80H–FFH), which is how registers like P1, TMOD and SCON are accessed by name.
D → II, register indirect. MOV A, @R0 — the "@" means R0 holds the address of the operand; the byte at that address is fetched into A. Only R0 and R1 (and DPTR for external memory) may serve as pointers, and indirect addressing is the only way to reach the upper 128 bytes of RAM in an 8052. It is the mode used for stepping through arrays and buffers.
The one-line contrast worth memorising: MOV A, #7FH loads the number 7FH, while MOV A, 7FH loads whatever is stored at address 7FH, and MOV A, @R0 loads whatever is stored at the address held in R0.
Hence, the correct matching is A-III, B-I, C-IV, D-II.
Similar Questions
In an 8086, AL = 19 BCD & BL = 36 BCD prior to execution of following example
ADD AL, BL
DAA
What will be content of AL after execution of the example ?
If SS = 3000 H and SP = 2000 H in 8086 microprocessor, in which memory addresses the contents of BL and BH are stored respectively, when PUSH BX instruction is executed.
The BIU of 8086 contains 16 bit segment registers. What is the width of address sent out by BIU of 8086 miocroprocessor?
Loop 1 : MOV A, P1
MOV P2, A
JNB P3.3, Loop1
The program does the following
In 8051 micro controller
A. INT0 and INT1 pins are normally low
B. Timer1 Interrupt Flag is auto cleared after occurrence
C. Serial interrupt is auto cleared after occurrence
D. Timer 0 Vector location is 000B H
Choose the correct answer from the options given below:
In 8086
A. The stack memory is a FIFO (First In First Out)
B. The JMP instruction cannot be prefixed with segment override prefix
C. SAHF and POPF instructions affect the flag register
D. DAS instruction cannot be used for 8 bit operations.
Choose the correct answer from the options given below :
In 8051
A. INT0 and INT1 can be made edge triggered by programming TCON
B. On reset serial communication interrupts has highest priority
C. Upon reset all interrupts are enabled
D. Only one interrupt is set aside for serial communication.
Choose the correct answer from the options given below:
Match List I with List II in 8086 Micro processor
LIST I LIST II A. Direct memory addressing data memory I. MOV [SI], 2500 H B. Immediate Addressing II. PUSHF C. Flag Manipulation III. RET D. Control transfer IV. MOV BX, [2000 H] Choose the correct answer from the options given below:
Arrange following interrupts in order of polling (checking interrupt conditions) after every instructions.
A. Serial Interrupt
B. External 1 Interrupt
C. Timer 1 Interrupt
D. External 0 Interrupt
Choose the correct answer from the options given below :
Given below are two statements : one is labelled as Assertion A and the other is labelled as Reason R
Assertion A : Some instruction read the contents of an internal port latch instead of reading the status of an external pin.
Reason R : We must not make a distinction between reading the status of the input pin and internal latch of the output port.
In the light of the above statements, choose the most appropriate answer from the options given below :
Important Questions from Microprocessors
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin
Description
a. D 0-D 7
1. Reset Input
b. RESET
2. Data Lines
c. A 0,A 1
3. Internal Address
