A. The byte is placed in the instruction decoder of the microprocessor.
B. The byte from the memory location is placed on data bus.
C. The control unit sends the control signal $\overline{\text{RD}}$ to enable the memory chip.
D. The microprocessor places the 16-bit memory address from program counter on the address bus.
Choose the correct answer from the options given below :
To understand how a microprocessor fetches a data byte from memory, let's analyze the sequence of steps involved:
The process starts with identifying the target memory location. The microprocessor uses the program counter (PC) to get the 16-bit memory address. This address is then placed onto the address bus, specifying where the data resides.
Following address placement, the microprocessor's control unit initiates the read operation. It sends a specific control signal, the read signal $\\overline{\text{RD}}$, to the memory system. This signal enables the target memory chip and indicates that data needs to be read.
With the correct address on the address bus and the read signal active, the memory chip responds. It fetches the requested byte from the specified location and places it onto the data bus. The data bus acts as the pathway for transferring this byte back to the microprocessor.
Finally, the data byte travels from the data bus into the microprocessor. It is then directed to the appropriate internal component, such as the instruction decoder, for further processing or execution according to the program's instructions.
The correct sequence combining these essential steps is D, C, B, A.
| List - I (Addressing Modes) | List - II (Instruction) |
| A. Immediate Addressing | I. LDAX B |
| B. Register Addressing | II. OUT 01H |
| C. Direct Addressing | III. MVI B, 37H |
| D. Indirect Addressing | IV. MOV A, B |
| List - I | List - II |
| (Memory) | (Characteristic) |
| A. ROM | I. Volatile, Fast, Expensive |
| B. EPROM | II. UV erasable |
| C. EEPROM | III. Electrically erasable |
| D. SRAM | IV. Non-Volatile, permanent data |
| List - I | List - II |
| (Bus/Logic) | (Function/Characteristic) |
| A. Address bus | I. Carries read/write signals, timing signals, and interrupt signals |
| B. Data bus | II. A three-state output that can be high, low, or high-impedance |
| C. Control bus | III. Unidirectional lines used by CPU to point to a memory location or I/O device |
| D. Tristate logic | IV. Bidirectional lines used for transferring data between the CPU and memory |