A. Interrupt acknowledged
B. Program counter content saved
C. Control transfered to ISR
D. Interrupt vector is read
Choose the correct answer from the options given below :
Handling an interrupt in the 8085 microprocessor involves a specific order of operations to ensure the current program can be resumed correctly after the interrupt is serviced.
The execution flow for handling an interrupt follows these steps:
Therefore, the correct sequence is A, B, D, C.
| List - I (Addressing Modes) | List - II (Instruction) |
| A. Immediate Addressing | I. LDAX B |
| B. Register Addressing | II. OUT 01H |
| C. Direct Addressing | III. MVI B, 37H |
| D. Indirect Addressing | IV. MOV A, B |
| List - I | List - II |
| (Memory) | (Characteristic) |
| A. ROM | I. Volatile, Fast, Expensive |
| B. EPROM | II. UV erasable |
| C. EEPROM | III. Electrically erasable |
| D. SRAM | IV. Non-Volatile, permanent data |
| List - I | List - II |
| (Bus/Logic) | (Function/Characteristic) |
| A. Address bus | I. Carries read/write signals, timing signals, and interrupt signals |
| B. Data bus | II. A three-state output that can be high, low, or high-impedance |
| C. Control bus | III. Unidirectional lines used by CPU to point to a memory location or I/O device |
| D. Tristate logic | IV. Bidirectional lines used for transferring data between the CPU and memory |