The given operational amplifier circuit corresponds to which electronic circuit application ?
Half wave rectification
Recognise the topology. An inverting op-amp stage with two diodes in the feedback path — one returning the op-amp output directly to the summing node and the other passing through Rf to the load — is the standard precision (super-diode) half-wave rectifier.
How it works, half cycle by half cycle.
For one polarity of Vi, the op-amp output drives D2 into conduction while D1 is reverse biased. The feedback loop is then closed through Rf, and the circuit behaves as an ordinary inverting amplifier:
\(V_o = -\dfrac{R_f}{R_i}V_i\)
For the opposite polarity, D2 turns off and D1 conducts instead. D1 closes the loop around the op-amp so that it does not saturate, but the output node is disconnected from the amplifier, so
\(V_o = 0\)
One polarity is passed (amplified and inverted), the other is blocked — that is half-wave rectification.
Why the op-amp is there at all. A plain diode rectifier cannot handle inputs smaller than its 0.7 V forward drop, and it distorts small signals badly. Inside the feedback loop the diode drop is divided by the open-loop gain, so the effective cut-in voltage falls to microvolts:
\(V_{\gamma(effective)} \approx \dfrac{V_\gamma}{A_{OL}}\)
This is what makes precision rectifiers essential in a.c. millivoltmeters, AM detectors and signal-conditioning front ends. The role of D1 is equally important: without it the op-amp would slam into saturation on the blocked half cycle and its slew-rate recovery would distort the next half cycle.
Why the other options are wrong. Full-wave rectification needs a second stage (typically a precision half-wave stage summed with the original signal in an inverting adder), so a single op-amp with two feedback diodes cannot deliver it. A voltage doubler is a capacitor–diode charge-pump with no feedback resistor. A peak detector requires a hold capacitor across the output to store the maximum value, which this circuit does not have.
Hence, the circuit performs half wave rectification.
Assertion (A) : An Op-Amp is a direct coupled high gain amplifier.
Reason (R) : It consists of one or more differential amplifiers and usually followed by a level translator and push pull stage.
The input to a differentiator is –5 V. Its output will be
Match the following :
| List – I | List – II |
| a. h-parameters | i. O/P voltage varies as the slope of i/p voltage |
| b. differentiator | ii. Noise division |
| c. half-wave rectifier | iii. Function of a Q point |
| d. integrator | iv. series diode clipper |
Codes :
Assertion (A) : Op-Amp is used for sensor circuit.
Reason (R) : A small signal amplifier amplify weak measured signals.
Consider the following circuit, the switch S1 allows the output to switch between two ranges of amplitudes from 0-0.1 V and 0-1 V. Arrange these values of R1, R2 and R3 in increasing order.

(A) Value of R1
(B) Value of R2
(C) Value of R3
Choose the most appropriate answer from the options given below :
Statements in connection to Op-Amp applications are :
A. If we use a square wave generator followed by integrator circuit we get a triangular wave at the output
B. The logarithmic amplifier called a log-amplifier or a logger, is basically a current to voltage converter.
C.
is a first order high pass filter with voltage follower
D. If we use a square wave generator followed by a clipping circuit then we get a saw-tooth wave generator.
Choose the correct answer from the options given below:
Match List I with List II
| LIST I | LIST II | ||
|---|---|---|---|
| A. | Single polarity positive voltage clipper circuit | I. | ![]() |
| B. | Negative clamping circuit | II. | ![]() |
| C. | Differentiator circuit | III. | ![]() |
| D. | Logarithmic Amplifier | IV. | ![]() |
Choose the correct answer from the options given below:
The correct flow in the basic block diagram of op-Amp is
A. Complementary symmetry push pull amplifier block.
B. Dual input unbalanced output differential amplifier block
C. Emitter follower with constant current source block
D. Dual-Input balanced output differential amplifier block
Choose the correct answer from the options given below :
Match the following :
| List - I | List - II |
a) ![]() | i) ![]() |
b) ![]() | ii) ![]() |
c) ![]() | iii) ![]() |
d) ![]() | iv) ![]() |
Codes :
\(\dfrac{d^{2}y}{dt^{2}}+y=0\) can be solved using an Operational Amplifier. Which one is preferred ?
In the circuit shown below, $R$ is $1\text{ k}\Omega$ and $R_f$ is $10\text{ k}\Omega$. If $V_{\text{in}}$ is $100\text{ mV}$ and the op-amps have supply voltages of $\pm 15\text{ V}$, then $V_{\text{out}}$ is _______ V.

For IC 741 circuit shown below, the maximum input frequency above which the output will be distorted is ____________.

Assume that an op-amp 741 connected as a unit gain inverting amplifier is applied with an input change of 10 V. Determine the time taken for the output to change by 10 V. [Slew rate for op-amp 741 = 0.5 V/µs]
What is the value of output voltage $V_o$ in the given circuit? Assume op-amp to be ideal and MOSFET operating in saturation region.
In an ideal op-amp, the common mode gain is _____________.