What is the correct sequence of the following step in the fabrication of a monolithic, bipolar junction transistor ? 1. Emitter diffusion Select the correct sequence using the codes given below :
2. Base diffusion
3. Buried layer formation
4. Epi-layer formation
3, 4, 2, 1
Two orderings are forced by physics, and together they fix the whole sequence.
First: the buried layer must precede the epitaxial layer. The \(n^{+}\) buried layer is diffused into the p-type substrate before the epi-layer is grown over it — that is what "buried" means. Its purpose is to provide a low-resistance path from the active collector region to the collector contact, cutting the collector series resistance and so reducing saturation voltage and improving switching speed. So 3 comes before 4, which eliminates options 2 and 4.
Second: the base must precede the emitter. The emitter is diffused into the base region, and it must be more heavily doped so that it overcompensates the base doping and forms a junction inside it. Diffusing the emitter first would leave nothing to diffuse it into. So 2 comes before 1, which eliminates option 1 and leaves option 3.
The complete flow :
| Step | Operation | Purpose |
|---|---|---|
| 1 | Buried layer (3) | n+ region in the p substrate, to lower collector resistance |
| 2 | Epitaxial growth (4) | Lightly doped n layer — becomes the collector |
| 3 | Isolation diffusion | p+ walls to separate adjacent devices |
| 4 | Base diffusion (2) | p region inside the epi-layer |
| 5 | Emitter diffusion (1) | n+ region inside the base |
| 6 | Contact windows and metallisation | Aluminium interconnect |
So the answer is 3, 4, 2, 1.
The general rule the sequence illustrates : each diffusion is more heavily doped than the region it enters, and each is shallower, so the doping profile is built from the bottom up. That is also why every subsequent high-temperature step drives the earlier diffusions deeper — the thermal budget must be planned for the whole sequence, not step by step.
Why "monolithic" matters here. In a discrete transistor the collector is the substrate itself and the collector contact is on the back. A monolithic device has all three contacts on the top surface, so collector current must travel sideways through the thin epi-layer — which would give a large series resistance were it not for the buried layer. That single constraint is the reason step 3 exists at all.
Hence, the correct sequence is 3, 4, 2, 1.
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