Read the following passage and answer the questions that follow : Diffusion of impurity atoms in silicon is important in silicon integrated circuit processing. The idea of using diffusion techniques to alter the type of conductivity in silicon or germanium was disclosed in a patent by Pfann. Since then various ways of introducing dopants into silicon by diffusion have been studied with the goal of controlling dopant distribution, total dopant concentration, its uniformity reproducibility, and of processing a large number of device wafers in a batch to reduce the manufacturing cost. The diffusion is used to form bases, emitters and resistors in bipolar devices technology, to form source and drain regions and to dope polysilicon in MOS device technology. Dopant atoms that span a wide range of concentrations can be introduced into silicon in many ways.
For a diffused layer that forms a p-n junction an average sheet resistance RS is defined and related to junction depth xj, the carrier mobility μ, and impurity distribution C(x) as :
\(R_{S}=\dfrac{1}{q\int_{0}^{x_{j}}\mu\,C(x)\,dx}\)
Sheet resistance is a resistance, so it must be the reciprocal of an integrated conductance — option 3:
\(R_{S}=\dfrac{1}{q\displaystyle\int_{0}^{x_{j}}\mu\,C(x)\,dx}\)
Building it from the conductivity. At any depth the local conductivity is
\(\sigma(x)=q\,\mu\,C(x)\)
Since the layer is non-uniformly doped, the conductances of its thin sub-layers add in parallel, which means integrating the conductivity through the layer:
\(G_{sheet}=\int_{0}^{x_{j}}\sigma(x)\,dx=q\int_{0}^{x_{j}}\mu\,C(x)\,dx\)
Sheet resistance is the reciprocal of that, which is exactly option 3.
Why the reciprocal is the decisive feature. Options 1 and 2 place the integral in the numerator, so a more heavily doped layer would have a higher resistance — the opposite of the truth. Adding dopant adds carriers and must lower the resistance, so the integral has to be in the denominator. That single test disposes of half the options.
Why the limits run only to xj. The junction depth is where the diffused dopant concentration falls to the background level of the substrate. Beyond it the material is of the opposite type and is isolated by the reverse-biased junction, so it carries none of the layer's current and must be excluded.
Why the temperature factor in options 2 and 4 is out of place. The \(RT/q\) group is a thermal voltage, and it belongs to the Einstein relation between mobility and diffusivity, not to a resistance calculation. Temperature does affect \(\mu\), but it enters through the mobility already inside the integral.
How it is used. Sheet resistance is quoted in "ohms per square", the unit being dimensionless because the resistance of a square patch is independent of its size:
\(R=R_{S}\dfrac{L}{W}\)
so a diffused resistor's value is set purely by counting squares in the layout. Irvin's curves relate \(R_{S}\), \(x_{j}\) and the surface concentration, so measuring the sheet resistance with a four-point probe gives the doping profile without sectioning the wafer.
Hence, RS is the reciprocal of the integrated conductivity.
Similar Questions
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Match List - I with List - II.
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Important Questions from Semiconductor Process Flow
A. For impurity diffusion in semiconductor, concentration gradient is the only essential requirement.
B. Annealing is a mandatory step after ion-implantation.
C. Wet etching is normally anisotropic
D. High temperature is required for the growth of $SiO_2$ because oxidation reaction takes place at high temperature
E. Bird's beak formation is a characteristic of LOCOS isolation
Choose the correct answer from the options given below:
Arrange the given process steps in sequence for self-aligned gate formation.
A. Thermal oxidation to grow gate oxide.
B. Polysilicon deposition
C. Photolithography using gate mask
D. Etching of polysilicon and oxide
E. Source/drain diffusion
Choose the correct answer from the options given below:
- Match the LIST-I with LIST-IIChoose the correct answer from the options given below:
LIST-I LIST-II A. Shallow trench isolation (STI) I. Low static power dissipation B. Junction isolation II. High static power dissipation C. CMOS technology III. High component density D. Bipolar IC technology IV. Low component density Given below are two statements: one is labelled as Assertion A and the other is labelled as Reason R
Assertion A: Impurity diffusion in semiconductor essentially needs very high temperature.
Reason R: Diffusivity of impurity atoms is negligibly small at room temperature.
In the light of the above statements, choose the most appropriate answer from the options given below
- In particle beam lithography, the resolution depends upon :
