Match the following : Codes :List - I List - II (a) Lift - off (i) Fick's Equation (b) Dry Etching (ii) PMMA (Poly Methyl Methacrylate) (c) Lithography (iii) Bombardment of Plasma (d) Diffusion (iv) Structures of Target Material on the Surface of Substrate
(a)-(iv), (b)-(iii), (c)-(ii), (d)-(i)
Each entry in List-II names the one thing that uniquely identifies its process. Take them one at a time.
(a) Lift-off → (iv) structures of target material on the surface of the substrate. Lift-off is a patterning technique rather than an etching one. A sacrificial resist layer is patterned first, the target material (metal, typically) is deposited over the whole wafer, and the resist is then dissolved — carrying away the unwanted metal and leaving the deposited material only where the resist was absent. The end product is exactly what List-II describes: islands of the target material standing on the substrate surface. It is the standard route for metals such as gold or lift-off-friendly alloys that are hard to etch cleanly.
(b) Dry etching → (iii) bombardment of plasma. "Dry" means no liquid etchant. Instead a gas is excited into a plasma and the resulting reactive species and energetic ions bombard the wafer, removing material chemically, physically (sputtering) or both, as in RIE. The defining feature is the plasma itself, and the practical payoff is anisotropy — vertical sidewalls, because the ions arrive vertically. Wet etching, by contrast, is isotropic and undercuts the mask.
(c) Lithography → (ii) PMMA. PMMA is the classic high-resolution resist, the workhorse positive resist of electron-beam lithography. Since a resist exists only to record a pattern from light or an electron beam, naming PMMA is naming lithography.
(d) Diffusion → (i) Fick's equation. Dopant diffusion into silicon is governed by Fick's laws:
\(J=-D\dfrac{\partial C}{\partial x}\qquad\text{and}\qquad \dfrac{\partial C}{\partial t}=D\dfrac{\partial^{2}C}{\partial x^{2}}\)
with \(D=D_{0}\exp\!\left(-\dfrac{E_{a}}{kT}\right)\), which is why diffusion depth scales as \(\sqrt{Dt}\) and why furnace temperature control is so critical.
| Process | Signature | Code |
|---|---|---|
| Lift-off | Deposited islands after resist removal | (iv) |
| Dry etching | Plasma bombardment | (iii) |
| Lithography | PMMA resist | (ii) |
| Diffusion | Fick's equation | (i) |
The pattern (iv), (iii), (ii), (i) is option 1. Note that even one certain link decides the question: diffusion with Fick's equation appears as (d)-(i) only in options 1 and 2, and dry etching is unmistakably plasma, which eliminates option 2.
Hence, the correct match is (a)-(iv), (b)-(iii), (c)-(ii), (d)-(i).
Match the following :
| List - I | List - II |
| (a) Lift OFF | (i) Etching |
| (b) Rant's Rule | (ii) Crystal Growtd |
| (c) Hydrofluoric acid | (iii) Packaging |
| (d) Float zone | (iv) Metallisation |
Codes :
What is the name of adhesion promoter used in case of positive photo resist ?
What is the correct sequence of the following step in the fabrication of a monolithic, bipolar junction transistor ?
1. Emitter diffusion
2. Base diffusion
3. Buried layer formation
4. Epi-layer formation
Select the correct sequence using the codes given below :
Read the following passage and answer the questions that follow :
Diffusion of impurity atoms in silicon is important in silicon integrated circuit processing. The idea of using diffusion techniques to alter the type of conductivity in silicon or germanium was disclosed in a patent by Pfann. Since then various ways of introducing dopants into silicon by diffusion have been studied with the goal of controlling dopant distribution, total dopant concentration, its uniformity reproducibility, and of processing a large number of device wafers in a batch to reduce the manufacturing cost. The diffusion is used to form bases, emitters and resistors in bipolar devices technology, to form source and drain regions and to dope polysilicon in MOS device technology. Dopant atoms that span a wide range of concentrations can be introduced into silicon in many ways.
When silicon dioxide of thickness d is grown, the Silicon consumed is :
Match List - I with List - II.
| List - I | List - II |
| (A) Annealing | (I) Isolation |
| (B) Sealing | (II) Doping |
| (C) Ion implantation | (III) Packing density |
| (D) Oxidation | (IV) Crystal restoration |
Choose the correct answer from the options given below :
Arrange the following in ascending order based on their diffusivity :
(A) Boron
(B) Arsenic
(C) Antimony
(D) Phosphorus
Choose the most appropriate answer from the options given below :
A thin layer of dopant is deposited onto silicon surface with a fixed total amount of dopants QT per unit area. If D is the diffusivity of dopants, then the surface concentration is :
The idea of using diffusion techniques was disclosed in patent by Pfann in the year :
Fick's second law of diffusion in one dimensional form can be expressed as :
A. For impurity diffusion in semiconductor, concentration gradient is the only essential requirement.
B. Annealing is a mandatory step after ion-implantation.
C. Wet etching is normally anisotropic
D. High temperature is required for the growth of $SiO_2$ because oxidation reaction takes place at high temperature
E. Bird's beak formation is a characteristic of LOCOS isolation
Choose the correct answer from the options given below:
| LIST-I | LIST-II |
| A. Shallow trench isolation (STI) | I. Low static power dissipation |
| B. Junction isolation | II. High static power dissipation |
| C. CMOS technology | III. High component density |
| D. Bipolar IC technology | IV. Low component density |
Given below are two statements: one is labelled as Assertion A and the other is labelled as Reason R
Assertion A: Impurity diffusion in semiconductor essentially needs very high temperature.
Reason R: Diffusivity of impurity atoms is negligibly small at room temperature.
In the light of the above statements, choose the most appropriate answer from the options given below
Match the following :
| List - I | List - II |
| (a) Lift OFF | (i) Etching |
| (b) Rant's Rule | (ii) Crystal Growtd |
| (c) Hydrofluoric acid | (iii) Packaging |
| (d) Float zone | (iv) Metallisation |
Codes :