Match List - I with List - II. Choose the correct answer from the options given below :List - I (8086 Instruction) List - II (Addressing mode) (A) MOV BX, AX (I) Register Relative Addressing (B) MOV AX, 50H[BX] (II) Direct Addressing (C) MOV AX, [BX] (III) Register addressing (D) MOV AX, [2000H] (IV) Register Indirect Addressing
(A)-(III), (B)-(I), (C)-(IV), (D)-(II)
The addressing mode is read off the syntax of the source operand — brackets and displacements are the tell. The code is (A)-(III), (B)-(I), (C)-(IV), (D)-(II), option 3.
| Instruction | Source operand | Mode | Where the data is |
|---|---|---|---|
| MOV BX, AX | A register, no brackets | Register | In AX itself |
| MOV AX, 50H[BX] | Displacement + bracketed register | Register relative | At address BX + 50H |
| MOV AX, [BX] | Bracketed register alone | Register indirect | At the address held in BX |
| MOV AX, [2000H] | Bracketed constant | Direct | At address 2000H |
The brackets are the key. Without them the operand is the data; with them the operand is the address of the data. So MOV BX, AX copies a value, while MOV AX, [BX] uses BX as a pointer — the same register, two entirely different meanings.
Distinguishing (B) from (C). Both use BX as a pointer, but (B) adds a fixed displacement of 50H to it. That makes it register relative, and it is exactly how a field within a record or an element of an array is reached: BX holds the base of the structure and the displacement selects the member. Effective address arithmetic in the 8086 is
\(EA=\text{base}+\text{index}+\text{displacement}\)
with register indirect using only the first term, register relative the first and third, and base-plus-index all three.
Distinguishing (A) from (D) is the other easy pair: (A) has no brackets at all, so no memory is touched and the instruction is the fastest kind — register to register. (D) has brackets round a constant, so the address is fixed at assembly time and cannot be changed while the program runs, which is what makes it direct rather than indirect.
Why the distinction matters practically. Only the indirect and relative forms allow a loop to walk through data, since only they compute the address at run time from a register that can be incremented. Direct addressing is faster for a single fixed variable but useless for arrays.
Hence, the correct code is (A)-(III), (B)-(I), (C)-(IV), (D)-(II).
Similar Questions
In an 8086, AL = 19 BCD & BL = 36 BCD prior to execution of following example
ADD AL, BL
DAA
What will be content of AL after execution of the example ?
If SS = 3000 H and SP = 2000 H in 8086 microprocessor, in which memory addresses the contents of BL and BH are stored respectively, when PUSH BX instruction is executed.
The BIU of 8086 contains 16 bit segment registers. What is the width of address sent out by BIU of 8086 miocroprocessor?
Loop 1 : MOV A, P1
MOV P2, A
JNB P3.3, Loop1
The program does the following
In 8051 micro controller
A. INT0 and INT1 pins are normally low
B. Timer1 Interrupt Flag is auto cleared after occurrence
C. Serial interrupt is auto cleared after occurrence
D. Timer 0 Vector location is 000B H
Choose the correct answer from the options given below:
In 8086
A. The stack memory is a FIFO (First In First Out)
B. The JMP instruction cannot be prefixed with segment override prefix
C. SAHF and POPF instructions affect the flag register
D. DAS instruction cannot be used for 8 bit operations.
Choose the correct answer from the options given below :
In 8051
A. INT0 and INT1 can be made edge triggered by programming TCON
B. On reset serial communication interrupts has highest priority
C. Upon reset all interrupts are enabled
D. Only one interrupt is set aside for serial communication.
Choose the correct answer from the options given below:
Match List I with List II in 8086 Micro processor
LIST I LIST II A. Direct memory addressing data memory I. MOV [SI], 2500 H B. Immediate Addressing II. PUSHF C. Flag Manipulation III. RET D. Control transfer IV. MOV BX, [2000 H] Choose the correct answer from the options given below:
Arrange following interrupts in order of polling (checking interrupt conditions) after every instructions.
A. Serial Interrupt
B. External 1 Interrupt
C. Timer 1 Interrupt
D. External 0 Interrupt
Choose the correct answer from the options given below :
Given below are two statements : one is labelled as Assertion A and the other is labelled as Reason R
Assertion A : Some instruction read the contents of an internal port latch instead of reading the status of an external pin.
Reason R : We must not make a distinction between reading the status of the input pin and internal latch of the output port.
In the light of the above statements, choose the most appropriate answer from the options given below :
Important Questions from Microprocessors
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin
Description
a. D 0-D 7
1. Reset Input
b. RESET
2. Data Lines
c. A 0,A 1
3. Internal Address
