For queue to be idle state in 8086
QS0 = 0, QS1 = 0
What QS1 and QS0 are for. The 8086 has a six-byte instruction queue filled by the Bus Interface Unit while the Execution Unit is busy — this pre-fetching is what gives the 8086 its pipelining. In maximum mode the two pins QS1 and QS0 broadcast what the queue did in the previous clock cycle, so that an external co-processor such as the 8087 can shadow the instruction stream and know exactly which instruction the CPU is executing.
Step 1 — recall the encoding.
| QS1 | QS0 | Queue status |
|---|---|---|
| 0 | 0 | No operation — queue is idle |
| 0 | 1 | First byte of an opcode taken from the queue |
| 1 | 0 | Queue is empty (flushed) |
| 1 | 1 | A subsequent byte of the opcode taken from the queue |
Step 2 — pick out the idle condition. "Idle" means nothing was fetched from the queue during that clock cycle, which is the "no operation" row:
\(QS_1=0,\qquad QS_0=0\)
Distinguish idle from empty — the trap in this question. The two are not the same thing. Idle (00) means the queue simply was not accessed this cycle. Empty (10) means the queue has been flushed and holds nothing — which happens after a branch, a jump, a call or an interrupt, because the pre-fetched bytes belong to the wrong path and must be discarded. Option 3, QS1 = 1 with QS0 = 0, is exactly that empty condition, and it is the distractor the question is built around.
A related detail worth carrying. The queue is refilled whenever at least two bytes are free, and the 8088 uses a four-byte queue rather than six because its external data bus is only eight bits wide, so it cannot pre-fetch as fast. In minimum mode these same pins carry different signals, so the queue-status encoding only applies with MN/MX̄ grounded.
Hence, the queue is idle when QS0 = 0 and QS1 = 0.
Similar Questions
A microprocessor is a semiconductor chip fabricated with entire central processing unit (CPU) on it. It is a programmable device that accepts binary data from an input device, processes the data according to the instructions stored in the memory and provides results as output. Basically microprocessor performs two functions - (a) Fetches an instruction from the memory and (b) Performs the operation specified by the instruction. There are special inputs to the microprocessor called interrupts. External devices use these interrupts to get the microprocessor attention. A micro computer can be built by using 8085 microprocessor along with many other chips such as 8155, 8255, 8279, 8253, 8257, 8259, 8251 etc. 8085 microprocessor is 8-bit microprocessor which has 8-bit data registers where as 8086 is a 16-bit microprocessor.
The following 8051 assembly program is given. Answer the questions based on it.
Line No. Mnemonics 1 MOV SP, #4F H 2 SET B PSW.3 3 MOV R0, #25H 4 MOV R1, #0AH 5 MOV R2, #06H 6 PUSH 8 7 PUSH 9 8 PUSH 0AH . . . V V 20 POP 8 $D_7$ $D_6$ $D_5$ $D_4$ $D_3$ $D_2$ $D_1$ $D_0$ In 8255 programmable peripheral interface device, if the port A and port B are to be set in a hand shake mode along with port C, what are the bits in the 8 bit control word to be set as 0 1 0.
The number system for the machine code of the microprocessor 8085 is
Which of the options in a multipurpose instruction used to implement the interrupt of 8085 and serial data input ?
Both 8155 and 8255 programmable peripheral interface ICs have the following common features :
(i) Programmable I/Os
(ii) Either port A or Port B can be set as either input or output ports.
(iii) One 14-bit down counter
(iv) AD0 – AD7 are multiplexed address/datalines.Each instruction in an assembly program has the following fields :
(i) Lable field
(ii) Operand field
(iii) Comment field
(iv) Mnemonic fieldPlease write the proper sequence of fields :
The mnemonic of 8085 processor indicate :
List – I List – II a. RLC i. Rotate Accumulator Right through carry b. RRC ii. Rotate Accumulator Left through carry c. RAR iii. Rotate Accumulator Left d. RAL iv. Rotate Accumulator Right Codes :
Match the following :
List – I (Pin terminals) List – II (Applications) a. SID, SOD i. Wait state b. READY ii. Serial data transfer c. TRAP iii. Address Latch Control d. ALE iv. Interrupt Codes :
Assertion (A) : In serial communication system, when the transmission of data goes in both ways, it is called full-duplex system. Now if two micro processors are connected in full duplex mode, the amount of data transmitted will be double to the amount of data in half-duplex mode connection.
Reason (R) : When the transmission of data goes in one way, it is called half-duplex system and when the data moves in both ways, it is called full duplex system.
Important Questions from Microprocessors
An 8086 address bus is a/an _____ -bit bus
Program counter for any counter:
In the pin out configuration of the 8085 microprocessor, the sequential input data is represented by
Which of the following functions is not performed by a microprocessor?
Match the columns.
Pin
Description
a. D 0-D 7
1. Reset Input
b. RESET
2. Data Lines
c. A 0,A 1
3. Internal Address
