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Question

Assertion (A) : It is convenient to write loop equations for a network containing voltage source but no current source.

Reason (R) : If the current sources are present, then these must be first converted into their equivalent voltage sources.

Select your answer using the codes given below.

This question was previously asked in
UGC NET 2016 Paper 3 Electronic Science Question Paper (10-Jul-2016)
The correct answer is

Both (A) and (R) are true and (R) is the correct explanation of (A).

Examine the assertion — true. Mesh (loop) analysis applies KVL around each independent loop, summing voltages. A voltage source enters the equation directly as a known term, so a network built only from voltage sources and impedances yields one clean equation per mesh:

\([Z][I]=[V]\)

with the mesh currents as the unknowns. Nothing extra is required.

Why a current source spoils this. The voltage across an ideal current source is unknown — it is whatever the rest of the circuit demands. So KVL round a mesh containing one introduces a second unknown alongside the mesh current, and the neat one-equation-per-mesh structure breaks down.

Examine the reason — true. The standard remedy is source transformation: a current source IS in parallel with an impedance Z becomes a voltage source in series with the same impedance,

\(V_S=I_SZ\)

Once every source is a voltage source, mesh analysis proceeds normally.

Does the reason explain the assertion? Yes. The assertion is that loop equations are convenient when only voltage sources are present; the reason states exactly what must be done when they are not, and the necessity of that extra conversion step is precisely what makes the voltage-source-only case the convenient one. Cause and consequence line up, giving code 1.

When conversion is impossible — the supermesh. An ideal current source with no parallel impedance cannot be transformed. The technique then is to form a supermesh: write one KVL equation round the outer boundary of the two meshes sharing the source, avoiding it entirely, and supply the missing equation from the source itself,

\(I_1-I_2=I_S\)

Two equations, two unknowns — the count still works out.

The dual, and how to choose. Nodal analysis is the mirror image: it prefers current sources and needs voltage sources converted, with a supernode for the ideal case. The practical rule is to count first — use mesh analysis when there are fewer meshes than nodes, nodal analysis when there are fewer nodes, since that minimises the number of simultaneous equations.

Hence, both statements are true and (R) is the correct explanation of (A).

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Similar Questions

  1. For the circuit given below, which are the correct two equations of Mesh current ?

    (A) 12I1 – 5I2 – 4I3 = –24
    (B) 5I1 + 18I2 + 6I3 = –112
    (C) –4I1 – 6I2 + 18I3 = –106
    (D) 2I1 + 3I2 – 7I3 = 106
    (E) –5I1 + 24I2 – 6I3 = 116

    Choose the most appropriate answer from the options given below :

  2. Consider a two-mesh network as shown in the figure :

    The values of I1 and Ibd and I2 are computed as

    (a) I1 = 1.885 amps, I2 = 0.341 amps

    (b) I1 = 1.885 amps, Ibd = 2.23 amps

    (c) I2 = –0.341 amps, Ibd = 1.885 amps

    (d) I2 = –0.341 amps, Ibd = 2.23 amps

    Which of the above computations are correct ?

  3. In the above mentioned figure, how much is the voltage around partial loop cefd and how much is the voltage around loop cefdc ?


Important Questions from Mesh Analysis

  1. Which of the following laws is applied for mesh analysis of the network?

  2. A _________ is a part of a network that lies between two junctions.

  3. For the circuit given below, which are the correct two equations of Mesh current ?

    (A) 12I1 – 5I2 – 4I3 = –24
    (B) 5I1 + 18I2 + 6I3 = –112
    (C) –4I1 – 6I2 + 18I3 = –106
    (D) 2I1 + 3I2 – 7I3 = 106
    (E) –5I1 + 24I2 – 6I3 = 116

    Choose the most appropriate answer from the options given below :

  4. Consider a two-mesh network as shown in the figure :

    The values of I1 and Ibd and I2 are computed as

    (a) I1 = 1.885 amps, I2 = 0.341 amps

    (b) I1 = 1.885 amps, Ibd = 2.23 amps

    (c) I2 = –0.341 amps, Ibd = 1.885 amps

    (d) I2 = –0.341 amps, Ibd = 2.23 amps

    Which of the above computations are correct ?

  5. In the above mentioned figure, how much is the voltage around partial loop cefd and how much is the voltage around loop cefdc ?

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