The word "vector" means an address, and that is precisely what the question describes. In a vectored interrupt the identity of the service routine is known the moment the interrupt is recognised: either the device places a call or restart instruction on the data bus during the acknowledge cycle, or the pin itself is hard-wired to a fixed location. Either way the processor is told where to go, so the answer is option 1.

The contrast is with a non-vectored interrupt. There, the interrupt line only says "attention needed" and the processor must poll each device in turn to discover which one asked — slower, and slower still as more devices are added.

Why the other options are different classifications altogether. "Maskable" and "non-maskable" answer a different question: not where does the processor go, but can the interrupt be ignored. A maskable interrupt can be disabled in software; a non-maskable one cannot and is reserved for emergencies such as power failure. The two classifications are independent, and the 8085 illustrates every combination:

INTR is the interesting case, and it is what the question's wording points at most directly: the device must place an instruction — usually one of the eight RST n opcodes, or a three-byte CALL — onto the data bus when the processor answers with INTA. The device therefore supplies both the request and the address, exactly as the question says. In larger systems the 8259 programmable interrupt controller does this job for up to eight devices, adding priority resolution.

Why vectoring matters is response time. A polled scheme costs several instruction times before the right routine even starts; a vectored one branches immediately — the difference between meeting and missing a deadline in real-time work.

Hence, such an interrupt is called a vectored interrupt.