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Question

Consider the following statements :

(A) An 8-input MUX can be implemented using any 4 variable function
(B) A 3-line to 8-line DEMUX can be used to implement any 4 variable functions
(C) A 64-input MUX can be built using nine 8-input MUXs
(D) A 6-line to 64-line DEMUX can be built using nine 3-line DEMUXs

Choose the most appropriate answer from the options given below :

This question was previously asked in
UGC NET 2023 Paper 1 Question Paper (22-Jun-2023) (Shift 2)
The correct answer is

(C) and (D) Only

 The two construction statements are correct and the two function-implementation statements are not — option 3.

(C) — building a 64-input MUX from 8-input MUXs. Two stages are needed:

StageCountJob
First8Each handles 8 of the 64 inputs, driven by the low three select bits
Second1Chooses among the eight first-stage outputs, driven by the high three select bits
Total9 

The six select lines of the 64-input MUX split three-and-three between the stages, and \(8\times8=64\) inputs are covered exactly.

(D) — the demultiplexer is the mirror image. One 3-to-8 DEMUX in the first stage steers the incoming data to one of eight second-stage devices, and each of those eight fans out to eight outputs, giving \(8\times8=64\) outputs from nine devices. The counts are identical because a demultiplexer is a multiplexer with the signal flow reversed.

(B) is false on a straightforward count. A 3-line to 8-line demultiplexer has only three select inputs, so it can generate the eight minterms of three variables. Four variables need sixteen minterms and therefore a 4-to-16 device. The statement is short by a factor of two.

(A) is false as written, and this is worth separating carefully. There is a true statement close to it: a \(2^{n}\)-to-1 multiplexer can implement any function of n + 1 variables, so an 8-input MUX can implement any 4-variable function — wire three variables to the select lines and the fourth, its complement, 0 or 1 to each data input, following the Shannon expansion. But statement (A) reverses this, saying the MUX can be implemented using a function, which is not a meaningful claim about hardware. Since option 3 is the only choice excluding both (A) and (B), the reversal is evidently intended.

The general rule for cascading is worth carrying away: to build a \(2^{m}\)-input multiplexer from \(2^{k}\)-input ones takes

\(\dfrac{2^{m}-1}{2^{k}-1}\ \text{devices}\)

which for m = 6 and k = 3 gives \(63/7=9\) — confirming both (C) and (D) in one line.

Hence, the correct statements are (C) and (D).

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Similar Questions

  1. Consider the following statements :

    A multiplexer :

    1. selects one of the several inputs and transmits it to a single output.
    2. routes the data from a single input to one of many outputs.
    3. converts parallel data into serial data.
    4. is a combinational circuit.

    Which of these statements are correct ?

  2. For the given 4 × 1 MUX, the output y is

  3. Following multiplexers have to be designed by different MUX. Arrange the number of MUX required in descending order

    A. Construct 4 : 1 MUX by using 2 : 1 MUX

    B. Construct 16 : 1 MUX by using 4 : 1 MUX

    C. Construct 64 : 1 MUX by using 4 : 1 MUX

    D. Construct 64 : 1 MUX by using 8 : 1 MUX

    E. Construct 256 : 1 MUX by using 8 : 1 MUX

    Choose the correct answer from the options given below :


Important Questions from Multiplexer

  1. The number of control lines in a multiplexer is 5, identify the MUX.

  2. Number of control lines required for 16 to 1 multiplexer is _____

  3. In a multiplexer, the number of input lines is ‘n’ and the number of select lines is ‘m’. Which of the following is correct?

  4. ________ is used to carry digital data on analog lines.

  5. Consider a logic gate circuit. with 8 input lines (D 0, D 1..... D 7) and 3 output lines (A 0, A 1, A 2) specified by following operations

    A 2= D 4+ D 5+ D 6+ D 7

    A 1= D 2+ D 3+ D 6+ D 7

    A 0= D 1+ D 3+ D 5+ D 0

    Where + indicates logical OR operation. This circuit is

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