A CPU has a 5-stage pipeline with the following stages Fetch (F), Decode (D), Execute (E), Memory (M) and Write-back (W). Each stage takes one clock cycle to complete. Assume there are no pipeline stalls and the pipeline is initially empty. How many clock cycles are required to complete the execution of 10 instructions ?
14
In an ideal k-stage pipeline with one-cycle stages and no stalls, the first instruction needs k cycles to pass through all stages; after that, one instruction finishes every cycle. So n instructions need k + (n − 1) cycles.
Step 1 — Here k = 5 stages (F, D, E, M, W) and n = 10 instructions.
Step 2 — The first instruction completes at cycle 5.
Step 3 — The remaining 9 instructions complete one per cycle, at cycles 6 to 14: \(5 + (10 - 1) = 14\).
Ten cycles ignores the time to fill the pipeline. Fifteen cycles counts k + n, adding one cycle too many. Nineteen cycles would correspond to a much longer pipeline or extra stalls, which the question rules out.
14 option is correct.
Similar Questions
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Which table for a dynamic pipeline become more interesting when a nonlinear pattern is follows?
A vector processor with 16 lanes can perform an operation on 1024 elements with each operation taking 5 clock cycles. How many cycles are needed to complete the operation ?
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Important Questions from Instruction Pipeline
Which one of the following is false about Pipelining?
In the case of parallelization, Amdahl’s law states that if P is the proportion of a program that can be made parallel and \((1-P)\) is the proportion that cannot be parallelized, then the maximum speed-up that can be achieved by using N processors is :
Which table for a dynamic pipeline become more interesting when a nonlinear pattern is follows?
A vector processor with 16 lanes can perform an operation on 1024 elements with each operation taking 5 clock cycles. How many cycles are needed to complete the operation ?
A multi processor system with 16 processors is used to execute a parallelizable task. If the serial portion of the task takes 200 clock cycles and the parallel portion take 800 clock cycles. When all 16 processor are used how many total clock cycles are required to complete the task ?
