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Question

Which of the following flip-flops is free from race condition ?

This question was previously asked in
UGC NET 2014 Paper 1 Question Paper (28-Dec-2014)
The correct answer is

Master-slave JK flip-flop

A level-triggered JK or T flip-flop suffers race-around: with J = K = 1 the output keeps toggling while the clock is high.

In a master-slave JK flip-flop the master responds while the clock is high and the slave copies it only when the clock goes low.

The output changes only once per clock pulse, so the race-around condition is removed.

Hence, Master-slave JK flip-flop.

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Important Questions from Flip-Flop

  1. The negative edge triggered JK flip-flop in the Figure has J and K inputs tied to Logic High and a square wave of 10 cycles/second is applied to its clock (C) input.
    The frequency of the output Q (in cycles/second) is __.
    (rounded off to two decimal places)

  2. Race Around condition can be avoided in Digital logic circuits using _______.

  3. A flip-flop is capable of storing ______ information.

  4. Consider the given circuit.

     In this circuit, the race around

  5. What is the characteristic of a master-slave flip-flop?

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