Match List I with List II Choose the correct answer from the options given below:LIST I ( IC classification) LIST II (Number of transistors used) A. VLSI I. 1000 \(\lt\) Number of transistors \(\lt\) 10,000 B. MSI II. Number of transistors \(\gt\) 10,000 C. LSI III. Number of transistors \(\lt\) 100 D. SSI IV. 100 \(\lt\) Number of transistors \(\lt\) 1,000
A-II, B-IV, C-I, D-III
The classification. Integrated circuits are graded by the scale of integration — how many transistors (or gates) sit on one chip. The number rose by roughly a factor of two every two years (Moore's law), and each named tier marks another decade of density.
| Class | Full name | Transistor count | Typical parts |
|---|---|---|---|
| SSI (D) | Small Scale Integration | < 100 → III | 7400-series gates, flip-flops |
| MSI (B) | Medium Scale Integration | 100–1,000 → IV | counters, MUXes, decoders, adders |
| LSI (C) | Large Scale Integration | 1,000–10,000 → I | early 8-bit µP (8080), small memories |
| VLSI (A) | Very Large Scale Integration | > 10,000 → II | modern processors, large memories |
Working through the matching.
D (SSI) is the smallest tier, so it takes the smallest bound, III (fewer than 100 transistors) — a 7404 hex inverter, for example, holds only six gates.
B (MSI) is the next step up and takes IV (100 to 1,000) — a 4-bit counter or an 8:1 multiplexer.
C (LSI) takes I (1,000 to 10,000) — enough for a complete early microprocessor.
A (VLSI) is the top tier and takes II (more than 10,000), which today extends into the billions; some texts add ULSI (Ultra Large Scale Integration) above a million transistors.
Shortcut. The names run in ascending size and the four ranges run in ascending size, so pairing them in order — SSI ↔ smallest range, VLSI ↔ largest — settles the question without recalling exact figures.
Hence, the correct matching is A-II, B-IV, C-I, D-III.
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To form the integrated circuits, VLSI technology uses
The application of SiO2 in VLSI technology is mainly
A. to use it as a 'Mask'.
B. to provide electrical isolation.
C. to provide surface activation.
D. to provide electrical conduction.
E. as a etching material.
Choose the most appropriate answer from the options given below :
In VLSI Design flow,
A. Algorithm describes the behaviour of target chip.
B. Architecture of processor is not mapped onto the chip surface by floor planning.
C. Behavioral domain defines FSMs.
D. Individual modules are implemented with leaf cells.
Choose the correct answer from the options given below:
The correct design flow of VLSI is :
A. Functional Design & verification
B. Circuit Design & verification
C. Logic Design & verification
D. Physical Design
E. Layout verification
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