If the output of a logic gate is zero when all its inputs are at logic 1. The gate is either
a NAND or an X-OR
The test to apply. Find every gate whose output is 0 when all inputs are at logic 1. Evaluate each gate type for the all-ones input (take two inputs, A = B = 1):
| Gate | Output for A = B = 1 | Satisfies the condition? |
|---|---|---|
| AND | 1·1 = 1 | No |
| OR | 1 + 1 = 1 | No |
| NAND | \(\overline{1\cdot 1}=0\) | Yes |
| NOR | \(\overline{1+1}=0\) | Yes |
| X-OR | 1 ⊕ 1 = 0 | Yes |
| X-NOR | 1 ⊙ 1 = 1 | No |
Reasoning behind each entry. A NAND is the complement of AND, and AND is 1 for all-ones, so NAND must be 0 — it is 0 only in this case. XOR outputs 1 only when an odd number of inputs are 1; with two inputs both at 1 the count is even, so the output is 0. XNOR, being the equality detector, gives 1 whenever the inputs are alike, so all-ones gives 1. AND obviously gives 1.
Now judge the option pairs — both gates in a pair must give 0:
Option 1 (NAND or AND): NAND ✔, but AND gives 1 ✘.
Option 2 (NOR or X-NOR): NOR ✔, but X-NOR gives 1 ✘.
Option 3 (NAND or X-OR): NAND ✔ and X-OR ✔ — both satisfy the condition.
Option 4 (NAND or X-NOR): NAND ✔, but X-NOR gives 1 ✘.
Note on NOR. A NOR gate also gives 0 for all-ones (it gives 1 only when every input is 0), so it too fits the stated condition — but the only option that pairs two valid gates is option 3, since option 2 spoils NOR by pairing it with X-NOR.
Takeaway. For questions of this kind, evaluate the single stated input combination for every gate rather than recalling full truth tables, then reject any option containing even one failing gate.
Hence, the gate is either a NAND or an X-OR.
Match the following :
| List – I | List – II |
| a. 7400 | i. Quad-2 input AND gate |
| b. 7402 | ii. Quad-2 input OR gate |
| c. 7408 | iii. Quad-2 input NAND gate |
| d. 7403 | iv. Quad-2 input NOR gate |
Codes :
Compute output of following logic gates as combinational circuit.

Match the following lists in terms of qualifying symbols for inputs and outputs :
| List - I | List - II |
a. ![]() | i. Non-logic connection |
b. ![]() | ii. Input for digital signals |
c. ![]() | iii. Logic negation at the input |
d. ![]() | iv. Active low input |
Correct codes are :
Which logical gate is included in a binary adder circuit to enable binary addition and subtraction?
A Circuit that operates in such a way that its output is high only when all its inputs are high
______ is also known as Inverter.
The minimum number of NAND gates required to reduce the expression ((A + B)C) D is:
In which of the following gates, the output is high if and only if all inputs are high?