A. $Z_{12} = Z_{21}$
B. $Y_{12} = Y_{21}$
C. $h_{12} = h_{21}$
D. $AD - BC = 1$
Choose the correct answer from the options given below :
To solve the given question about two-port reciprocal networks, we need to understand the properties and definitions associated with reciprocal networks in different parameter representations such as impedance (Z-parameters), admittance (Y-parameters), hybrid (h-parameters), and ABCD parameters. Let's analyze each statement one by one:
Statement A: \(Z_{12} = Z_{21}\)
This statement refers to the condition of reciprocity for Z-parameters (impedance parameters). For a reciprocal network, the Z-parameters should be equal, i.e., \(Z_{12} = Z_{21}\). This statement is correct for reciprocal networks.
Statement B: \(Y_{12} = Y_{21}\)
This statement refers to the condition of reciprocity for Y-parameters (admittance parameters). For a reciprocal network, the Y-parameters should also be equal, i.e., \(Y_{12} = Y_{21}\). This statement is correct for reciprocal networks.
Statement C: \(h_{12} = h_{21}\)
For h-parameters (hybrid parameters), the condition for reciprocity is that \(h_{12} = -h_{21}\), not \(h_{12} = h_{21}\). Therefore, this statement is incorrect for a reciprocal network.
Statement D: \(AD - BC = 1\)
This statement refers to the condition of reciprocity for ABCD parameters (also known as transmission parameters or chain parameters). For a reciprocal network, the determinant condition \(AD - BC = 1\) must be satisfied. This statement is correct for reciprocal networks.
Based on the analysis, the correct statements for a reciprocal network are A, B, and D. Therefore, the correct answer is:
A, B, D only
| List - I (Addressing Modes) | List - II (Instruction) |
| A. Immediate Addressing | I. LDAX B |
| B. Register Addressing | II. OUT 01H |
| C. Direct Addressing | III. MVI B, 37H |
| D. Indirect Addressing | IV. MOV A, B |
| List - I | List - II |
| (Memory) | (Characteristic) |
| A. ROM | I. Volatile, Fast, Expensive |
| B. EPROM | II. UV erasable |
| C. EEPROM | III. Electrically erasable |
| D. SRAM | IV. Non-Volatile, permanent data |
| List - I | List - II |
| (Bus/Logic) | (Function/Characteristic) |
| A. Address bus | I. Carries read/write signals, timing signals, and interrupt signals |
| B. Data bus | II. A three-state output that can be high, low, or high-impedance |
| C. Control bus | III. Unidirectional lines used by CPU to point to a memory location or I/O device |
| D. Tristate logic | IV. Bidirectional lines used for transferring data between the CPU and memory |