The assertion is true and standard; the reason is false because of the word "only" — option 3.

Why a demultiplexer can serve as a decoder. The two circuits are almost the same hardware. A 1-to-\(2^{n}\) demultiplexer has one data input, n select lines and \(2^{n}\) outputs, and routes the data to the output the select code names. Now hold the data input permanently at logic 1: the selected output goes high and all others stay low — which is precisely what a decoder does with the select lines read as its input code. The data input has become an enable, and this is why manufacturers sell one part, such as the 74138, as a "decoder / demultiplexer".

Why the reason fails. Each output implements a minterm of the select variables:

\(Y_{0}=D\cdot\overline{S_{1}}\cdot\overline{S_{0}},\qquad Y_{3}=D\cdot S_{1}\cdot S_{0}\)

The complemented terms cannot be produced by AND gates — inverters are required on every select line, and in practice each line drives both its true and complemented form to all the AND gates. A circuit of AND gates alone could generate only \(Y_{3}\); the other outputs would never be reachable. The word "only" is what makes the statement false.

Real devices go further still. Most decoders are built with NAND gates and give active-low outputs, since that suits the chip-select inputs of memories and peripherals, which are themselves active low. So even the "AND" part is not literally true of typical hardware.

The answer is flagged because a lenient reading might treat AND gates as shorthand for the whole minterm-generating network; but as written, "AND gates only" excludes the inverters the circuit cannot work without.

Where the distinction is put to use : address decoding. The high address bits drive a 74138, and one of its outputs enables each memory chip — a decoder application — while the same part with a signal on its enable pin routes that signal to one of eight destinations, a demultiplexer application.

Hence, (A) is true, but (R) is false.