Assertion (A) : A decoder is dissimilar to a demultiplexer. Reason (R) : There is no data input in a decoder. Select your answer using the codes given below.
Both (A) and (R) are true and (R) is correct explanation of (A).
Set the two circuits side by side. Both have n select/address lines and 2n outputs, and in both only one output is active at a time. The difference is in what appears on that active output.
| Decoder | Demultiplexer | |
|---|---|---|
| Inputs | n address lines (plus an enable) | n select lines and one data input |
| Outputs | 2n, one asserted | 2n, one carrying the data |
| Selected output value | fixed logic 1 (or 0) | whatever the data input is |
| Purpose | convert a code into a one-of-many signal | route one data stream to one of many destinations |
Examine the assertion — true. The two blocks are not the same function. A decoder identifies a code; a demultiplexer routes data. They are close relatives, but they are not identical.
Examine the reason — true. The decoder has no separate data input at all: its outputs are determined entirely by the address, so the selected line simply goes active. The demultiplexer has an extra terminal whose value is copied onto the selected line.
Does the reason explain the assertion? Yes — and it is the only structural difference between them. Everything else about the two circuits is identical, so the absence of a data input is precisely what makes a decoder dissimilar to a demultiplexer. That gives code 1.
The practical link between them. Because the difference is so small, one chip serves both roles: a decoder with an active-low enable becomes a demultiplexer if the data stream is applied to the enable pin. The 74138 3-to-8 decoder is used as a 1-to-8 demultiplexer exactly this way, feeding data into one of its enable inputs while the address lines select the destination.
The other everyday use. A decoder's outputs are the minterms of its inputs, so a decoder plus an OR gate implements any Boolean function directly from its sum-of-minterms form — and the same property makes decoders the standard address-selection logic in memory systems.
Hence, both statements are true and (R) is the correct explanation of (A).
Similar Questions
Assertion (A) : A demultiplexer can be used as a decoder.
Reason (R) : A demultiplexer is built by using AND gates only.
Match the following :
List – I List – II a. Shift Register i. Frequency Division b. Multiplexer ii. Memory chip select generation c. Decoder iii. Parallel to serial conversion d. Counter iv. Many to one switch Codes :
Match the following :
List - I List - II (a) Minimization (i) Multiplexer (b) Successive Approximation (ii) Shift Register (c) Data Selector (iii) A/D Convertor (d) Sequence Generator (iv) QM Metdod Codes :
List – I List – II a. Multiplexer i. Selects one of many inputs to a single output b. Flip-Flop ii. Combinational circuit c. Shift Register iii. Memory d. Parallel Adder iv. Sequential logic Codes :
Important Questions from Combinational Circuits
Which of the following represents the borrow in a half subtraction?
Carry input is present in which of the following?
The number of control lines for 8-to-1 multiplexer is:
X/Y (where X represents the input code and Y represents the output code) as a qualifying symbol does NOT relate to:
Consider 4-bit gray code representation of numbers. Let h3 h2 h1 h0 be the gray code representation of a number n and g1g2g3g0 be the gray code representation of the number (n + 1) modulo 16. Which one of the following functions is correct?
