The problem asks for the angle of incidence ($\theta_i$) at which total reflection occurs when a TEM wave moves from a dielectric medium 1 ($\epsilon_{r1} = 2$) to a dielectric medium 2 ($\epsilon_{r2} = 1$) at an oblique angle.
For non-magnetic dielectric materials ($\mu_r = 1$), the refractive index ($n$) is related to the relative permittivity ($\epsilon_r$) by the formula:
$n = \sqrt{\mu_r \epsilon_r} = \sqrt{\epsilon_r}$
Calculate the refractive indices for both media:
Total internal reflection occurs when the wave travels from a medium with a higher refractive index to one with a lower refractive index ($n_1 > n_2$), and the angle of incidence exceeds the critical angle ($\theta_c$). In this case, $n_1 = \sqrt{2}$ and $n_2 = 1$, so $n_1 > n_2$, and total reflection is possible.
The critical angle $\theta_c$ is found using the relationship derived from Snell's Law, where the angle of refraction is $90^\circ$:
$\sin(\theta_c) = \frac{n_2}{n_1}$
Substitute the calculated refractive indices:
$\sin(\theta_c) = \frac{1}{\sqrt{2}}$
To find the angle $\theta_c$, we take the arcsine:
$\theta_c = \arcsin\left(\frac{1}{\sqrt{2}}\right)$
This value corresponds to:
$\theta_c = 45^\circ$
Therefore, the angle of incidence for total reflection is $45^\circ$. This matches Option C.
| List - I (Addressing Modes) | List - II (Instruction) |
| A. Immediate Addressing | I. LDAX B |
| B. Register Addressing | II. OUT 01H |
| C. Direct Addressing | III. MVI B, 37H |
| D. Indirect Addressing | IV. MOV A, B |
| List - I | List - II |
| (Memory) | (Characteristic) |
| A. ROM | I. Volatile, Fast, Expensive |
| B. EPROM | II. UV erasable |
| C. EEPROM | III. Electrically erasable |
| D. SRAM | IV. Non-Volatile, permanent data |
| List - I | List - II |
| (Bus/Logic) | (Function/Characteristic) |
| A. Address bus | I. Carries read/write signals, timing signals, and interrupt signals |
| B. Data bus | II. A three-state output that can be high, low, or high-impedance |
| C. Control bus | III. Unidirectional lines used by CPU to point to a memory location or I/O device |
| D. Tristate logic | IV. Bidirectional lines used for transferring data between the CPU and memory |