Match the following : Codes :Addressing Mode Location of operand a. Implied i. Registers which are in CPU b. Immediate ii. Register specifies the address of the operand. c. Register iii. Specified in the register d. Register Indirect iv. Specified implicitly in the definition of instruction
a-iv, b-iii, c-i, d-ii
An addressing mode specifies where the operand of an instruction is located. The four modes in the Addressing Mode column are defined in Morris Mano as follows.
a. Implied mode: the operand is specified implicitly in the definition of the instruction (for example CMA operates on the accumulator, or zero-address stack instructions), so a matches iv.
c. Register mode: the operand is held in registers which are in the CPU; the instruction names the register, so c matches i.
d. Register indirect mode: the selected register does not hold the operand but specifies the address of the operand in memory, so d matches ii.
b. Immediate mode: the operand is supplied as part of the instruction itself (the operand field holds the actual value). With i, ii and iv already used by register, register indirect and implied modes, the remaining description iii goes with immediate, giving b-iii.
Any code that sends immediate to i or iii to register fails because register mode is the one whose operand sits in the CPU registers; a code that sends register indirect to iii or i fails because in register indirect mode the register holds an address, not the operand; and a code that pairs register with ii swaps the register and register-indirect definitions.
a-iv, b-iii, c-i, d-ii option is correct.
Similar Questions
What will be the hexadecimal value in the register ax (32-bit) after executing the following instructions ?
mov al, 15
mov ah, 15
xor al, al
mov cl, 3
shr ax, cl
Codes :
The advantage of _______ is that it can reference memory without paying the price of having a full memory address in the instruction.
Which of the following are not data manipulation instructions?
A. Call
B. Loud
C. And
D. Increment
E. Shift
Choose the correct answer from the options given below:
The _____ addressing mode is similar to register indirect addressing mode, except that an offset is added to the contents of the register. The offset and register are specified in the instruction.
Important Questions from Machine Instructions and Addressing Modes
- Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand.
Which one of the following sequences of instructions corresponds to the high-level language statement $Z = X + Y$ ?
Note: X, Y, and Z are memory operands. R0, R1, and R2 are registers. Consider the following program fragment in assembly language:
mov ax, 0h
mov cx, 0A h
doloop:
dec ax
loop doloop
What is the value of ax and cx registers after the completion of the doloop?
- Instruction AAA is used to
- Which of the following is/are part of an Instruction Set Architecture of a processor?
The following language uses mnemonic OP codes
