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Question

In _____ method, the word is written to the block in both the cache and main memory, in parallel.

This question was previously asked in
UGC NET 2016 Paper 1 Question Paper (10-Jul-2016)
The correct answer is

Write through

A cache write policy decides when a write to a cached block reaches main memory.

Under write through, every write updates the word in the cache block and, at the same time, the corresponding word in main memory, so main memory always holds the current value. This matches the description of writing to both the cache and main memory in parallel.

Under write back only the cache block is updated and a dirty bit is set; main memory is updated later, when the block is replaced. Write protected describes a block or page that may not be written at all, and direct mapping is a placement (mapping) technique that decides which cache line a block goes to, not a write policy.

Write through option is correct.

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Similar Questions

  1. A hierarchical memory system that uses cache memory has cache access time of 50 nano seconds, main memory access time of 300 nano seconds, 75% of memory requests are for read, hit ratio of 0.8 for read access and the write-through scheme is used. What will be the average access time of the system both for read and write requests ?

  2. Which are often needed to evaluate the cache performance?


Important Questions from Cache Memory

  1. In advanced microprocessors, cache memories are used to

  2. The transformation of data from main memory to cache memory is referred as:
  3. Which of the following statements are true?
    A. In the write-through policy, only the cache is updated
    B. In the write-back policy, both cache and main memory are updated
    C. Cache coherence problems exist in multiprocessors with private caches because of the need to share writable data
    D. Cache coherence problem can be solved by means of hardware-only scheme
    Choose the correct answer from the options given below:
  4. Consider a system with a processor and a 4 KB direct mapped cache with block size of 16 bytes. The system has a 16 MB physical memory. Four words P, Q, R, and S are accessed by the processor in the same order 10 times. That is, there are a total of 40 memory references in the sequence P, Q, R, S, P, Q, R, S, …….

    Assume that the cache memory is initially empty. The physical addresses of the words are given below (1 word = 1 byte).

    P: 0x845B32, Q: 0x845B26, R: 0x845B36, S: 0x846B32

    Which of the following statements is/are true?

    Note: 1K=$2^{10}$ and 1M=$2^{20}$

  5. A hierarchical memory system that uses cache memory has cache access time of 50 nano seconds, main memory access time of 300 nano seconds, 75% of memory requests are for read, hit ratio of 0.8 for read access and the write-through scheme is used. What will be the average access time of the system both for read and write requests ?

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