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Question

Assertion (A) : Flash memory is non-volatile memory that can be electrically erased and reprogrammed.

Reason (R) : Flash memory is a specific type of EEPROM that is erased and programmed, in-circuit, in large blocks in contrast to EEPROM which is erased and reprogrammed at the byte level.

Select your answer using the codes given below :

This question was previously asked in
UGC NET 2015 Paper 3 History Question Paper (28-Jun-2015)
The correct answer is

Both (A) and (R) are true and (R) is the correct explanation of (A)

Both statements are true, and the reason explains exactly what kind of device the assertion is describing, so the code is 1.

Why flash is non-volatile. Each cell is a MOSFET with an extra floating gate completely surrounded by insulating oxide. Charge placed on that gate has no conducting path away from it, so it stays for a decade or more with no power applied. Its presence shifts the transistor's threshold voltage:

Floating gateThresholdReads as
UnchargedLow1
Charged with electronsHigh0

How it is written and erased. Programming injects electrons onto the gate by hot-carrier injection or Fowler-Nordheim tunnelling; erasure removes them by tunnelling in the reverse direction, driven by a high field. Both are electrical, done in circuit, with no ultraviolet lamp and no removal of the chip — which is the whole advance over the EPROM.

The block-erase distinction in (R) is the essential one. Byte-level erase circuitry costs transistors per cell; erasing in blocks lets that circuitry be shared, so a flash cell is markedly smaller and cheaper than an EEPROM cell. The trade-off is granularity:

EEPROMFlash
Erase unitByteBlock / sector (KB to MB)
Cell sizeLargerSmaller — higher density
Cost per bitHighLow
Typical useSmall parameter storageFirmware, SSDs, memory cards

The consequences of block erasure shape everything built on flash. A single byte cannot be rewritten in place: the containing block must be read, erased and rewritten, which is why flash devices need a flash translation layer to remap logical addresses. Endurance is finite — the tunnelling gradually damages the oxide, giving perhaps \(10^{4}\) to \(10^{5}\) erase cycles — so controllers spread writes across the device by wear levelling.

NOR and NAND divide the market along the same axis: NOR allows random read access and is used for code that must execute in place, while NAND is denser and page-oriented and is used for bulk storage in SSDs and memory cards.

Hence, both (A) and (R) are true and (R) is the correct explanation of (A).

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Similar Questions

  1. EPROM stands for :

  2. Match the following :

    List - IList - II 
    (a) 24C01(i) Parallel EPROM
    (b) 28C64(ii) EPROM
    (c) 74S288(iii) Serial EEPROMS
    (d) 27C010(iv) TTL PROM

     

    Codes :


Important Questions from Semiconductor Memories

  1. Each cell of a static RAM contains

  2. Which of the following memories can be programmed once by the user and then cannot be erased and reprogrammed?

  3. How many storage locations are available when a memory device has 12 address lines?
  4. How many bits are in a byte?

  5. Class of mass memory devices that use a laser beam to write and read on to a specified coated disk

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