A 4 KB EPROM is organized with 8 data lines. How many address lines does it have?
12
This is a memory-organisation problem. A memory chip is described as (number of locations) × (bits per location). The address lines select which location, and the data lines carry the contents of that location. The number of distinct locations that n address lines can select is 2n, so the address-line count is fixed by how many locations there are — not by how wide each location is.
Given: a 4 KB EPROM with 8 data lines (each location holds 8 bits = 1 byte).
Step 1 — find the number of locations. Since each location stores 1 byte, 4 KB corresponds to 4096 byte-locations:
- 4 KB = 4 × 1024 = 4096 locations = 212
Step 2 — find the address lines:
- Number of address lines = log2(4096) = 12
So the chip is organised as 4096 × 8: 12 address lines uniquely select one of 4096 bytes, and 8 data lines transfer that byte.
Why the other answers are wrong: 8 confuses the data width with the address width — the 8 refers to bits per location, not addressing. 10 would only address 210 = 1024 locations (1 KB), too few. 14 would address 214 = 16384 locations (16 KB), far more than needed. Only 12 lines give exactly 4096 locations.
Important Questions from Memory Address and Capacity
Minimum number of bits needed to address 2000 memory location are
Addressing of a 32K × 16 memory is realized using a single decoder. The minimum number of AND gates required for the decoder is
An 8 Kbyte ROM with an active low Chip Select input\(\left( {\overline {{\rm{CS}}} } \right)\) is to be used in an 8085 microprocessor-based system. The ROM should occupy the address range 1000H to 2FFFH. The address lines are designated as 𝐴15 to 𝐴0, where 𝐴15 is the most significant address bit. Which one of the following logic expressions will generate the correct \(\overline {{\rm{CS}}}\) signal for this ROM?
_______ register in a PC holds the address of the location to be accessed.
A single unit which is composed of small group of bits is known as-
