This is a memory-organisation problem. A memory chip is described as (number of locations) × (bits per location). The address lines select which location, and the data lines carry the contents of that location. The number of distinct locations that n address lines can select is 2ⁿ, so the address-line count is fixed by how many locations there are — not by how wide each location is.

Given: a 4 KB EPROM with 8 data lines (each location holds 8 bits = 1 byte).

Step 1 — find the number of locations. Since each location stores 1 byte, 4 KB corresponds to 4096 byte-locations:

• 4 KB = 4 × 1024 = 4096 locations = 2¹²

Step 2 — find the address lines:

• Number of address lines = log₂(4096) = 12

So the chip is organised as 4096 × 8: 12 address lines uniquely select one of 4096 bytes, and 8 data lines transfer that byte.

Why the other answers are wrong: 8 confuses the data width with the address width — the 8 refers to bits per location, not addressing. 10 would only address 2¹⁰ = 1024 locations (1 KB), too few. 14 would address 2¹⁴ = 16384 locations (16 KB), far more than needed. Only 12 lines give exactly 4096 locations.