The organisation of a processor's memory is described by its architecture. Two classic models exist. In the Von Neumann architecture, program instructions and data share a single memory space and a single bus, so instruction fetches and data transfers must take turns. In the Harvard architecture, program (code) memory and data memory are physically separate, each with its own bus.

The 8051 microcontroller follows the Harvard architecture, so the correct statement is that it uses separate memory for program and data. In the 8051:

• Program memory holds instructions and is addressed by the Program Counter (PC); it can be on-chip ROM/flash and can be extended externally up to 64 KB.
• Data memory comprises the internal RAM (registers, bit-addressable area, general RAM) plus external data RAM, also extendable up to 64 KB, accessed with instructions such as MOVX.
• Because the two spaces are separate, the CPU can fetch the next instruction while reading or writing data, improving throughput.

Why the other statements are wrong:

• Using a single memory for program and data describes the Von Neumann model, which is exactly what Harvard is not.
• Having no external memory support is false — the 8051 explicitly supports external program and data memory, each expandable to 64 KB.
• Using only RAM is incorrect because program code resides in non-volatile program memory (ROM/flash), while RAM is used for data; the device relies on both.