The most common kind of area defect found in silicon is the ________ and it always occur along ________ plane.
Stacking fault, 111
The question asks for an area defect, and in silicon that is the stacking fault, which lies on the {111} planes — option 1.
Crystal defects are classified by dimension, and knowing the ladder fixes the answer immediately:
| Dimension | Name | Examples in silicon |
|---|---|---|
| 0-D, point | Point defect | Vacancy, interstitial, substitutional impurity |
| 1-D, line | Line defect | Edge and screw dislocations |
| 2-D, area | Area defect | Stacking fault, grain boundary, twin |
| 3-D, volume | Volume defect | Precipitates, voids |
What a stacking fault is. Silicon has the diamond cubic structure, which can be described as {111} planes stacked in the repeating sequence
\(\ldots ABCABCABC\ldots\)
A stacking fault is a local break in that sequence — a plane inserted or removed, giving for instance \(\ldots ABCA\underline{C}ABC\ldots\). Because the fault is a misplaced plane, it necessarily occupies a plane, which is what makes it two-dimensional.
Why the {111} plane and no other. The {111} planes are the most densely packed in the diamond lattice, so they have the lowest surface energy per unit area and the widest spacing between adjacent planes. Both facts mean it costs least energy to disturb the stacking there, so faults form on {111} in preference to {100} or {110}. The same close packing is why silicon cleaves along {111} and why anisotropic etchants such as KOH attack {111} most slowly.
Why the "extrinsic" options are traps. Intrinsic and extrinsic are the two kinds of stacking fault — extrinsic means an extra plane inserted, intrinsic means one removed. "Extrinsic fault" is therefore a description of a stacking fault, not a separate defect, and options 2 and 4 give the qualifier without the name.
Why it matters in fabrication. Oxidation-induced stacking faults grow during thermal oxidation from surface damage or contamination, and being electrically active they act as generation-recombination centres — raising junction leakage and degrading the refresh time of DRAM cells. Controlling them is one of the reasons wafer surfaces are cleaned so scrupulously before high-temperature steps.
Hence, the answer is stacking fault, along the 111 plane.
Arrange the following materials with respect to their relative dielectric constants in descending orders :
(A) Ge
(B) C
(C) CdS
(D) TiO2
Choose the most appropriate answer from the options given below :
Atomic numbers for the following semiconducting and doping materials like Ga, In, As, Sb are respectively :
A. 33
B. 49
C. 31
D. 51
Choose the correct answer from the options given below :
Arrange the following materials in ascending order based on their mobility of electrons at 300 K :
(a) Germanium (b) Silicon (c) Gallium Arsenide (d) Gallium Nitride
Codes :
Energy bands of a material is decided by :
(a) The atomic number
(b) Relative spacing of atoms in the solids
(c) Melting point of the material
(d) Hardness of the material
Which of the following is correct ?
Which of the following is NOT an advantage of a hot carrier diode?
Silicon Controlled Rectifier (SCR) is usually turned on by
The forbidden energy gap for germanium is
Which of the following is NOT an example of a semiconductor material?
In an N-type semiconductor, there are