In an npn diffused junction transistor, the p-type base region is formed on the n-type collector region through the process of :
Diffusion of P-type of impurity
The question names the technology in its own wording. A diffused junction transistor is by definition one whose junctions are formed by diffusion — option 3. Each of the other choices is a real fabrication technique, but each defines a different class of transistor.
How the diffusion step works. The n-type collector wafer is oxidised and a window is opened in the oxide by photolithography. The wafer is then held at 1000–1200 °C in an atmosphere containing a group-III dopant — boron for a p-type base — which diffuses into the exposed silicon and over-compensates the existing donors near the surface:
\(N_A(x) \gt N_D \ \Rightarrow\ \text{p-type};\qquad N_A(x_j)=N_D \ \Rightarrow\ \text{the junction}\)
The metallurgical junction sits at the depth xj where the two concentrations are equal. A second, shallower and heavier diffusion of phosphorus then forms the n+ emitter inside the base — which is why the technique is called double-diffused.
Why diffusion displaced everything else. The profile follows the diffusion equation
\(x_j\propto\sqrt{Dt}\)
so the base width is controlled by temperature and time, both of which can be held to a fraction of a percent. Base widths below a micrometre became routine, and a narrow base is what gives high current gain and a high cut-off frequency.
What the other options actually describe.
| Technique | Device it defines | Limitation |
|---|---|---|
| Alloying | Alloy-junction transistor — an indium pellet is fused into germanium | Ragged junction, poor base-width control |
| Epitaxial growth | Grows the lightly doped collector on an n+ substrate | Used with diffusion, not instead of it |
| Changing doping during crystal growth | Grown-junction transistor | Whole ingot committed; wasteful and slow |
Note the useful distinction in option 2: epitaxy adds a new layer on the surface, whereas diffusion converts the type of material already present. In a modern bipolar process both are used — epitaxy for the collector, diffusion for base and emitter.
Hence, the p-type base is formed by diffusion of a p-type impurity.
Similar Questions
The evaporation rate from a clean surface is related to the equilibrium vapour pressure Pe of the evaporating species of molecular weight M by an expression :
Czochralski (Cz) method is used instead of using float zone technique to grow Si crystal because it produces :
Czochralski system of crystal growth is a
The thermal oxidation of silicon single crystal producer stacking faults lying on the plane.
The desired properties of metallization for integrated circuits are
A. low resistivity.
B. low conductivity.
C. easy to etch for pattern generation.
D. tough to etch for pattern generation.
E. no contamination with device or wafers.
Choose the correct answer from the options given below :
The major processing steps of BJT IC fabrication in VLSI technology are
A. Oxidation
B. Diffusion
C. Crystal growth
D. Photolithography
E. Epitaxial layer formation
Choose the correct ascending order from the options given below :
MEMS devices are within the size range of
Given below are two statements :
Statement I : Concentration of acceptor atoms in the region between isolation islands in a monolythic integrated circuit will be much higher then in a p-type substrate.
Statement II : The higher density is provided to prevent the depletion region of the reverse biased isolation to substrate junction from extending into the p+ type material.
In the light of the above statements, choose the most appropriate answer from the options given below :
Arrange the following fabrication steps in order needed to fabricate the IC :
(a) Oxidation (b) Etching (c) Metallization (d) Epitaxial growth
Codes :
Assertion (A) : In a bipolar IC fabrication, the diode isolation is used to isolate one device from the other.
Reason (R) : P+n diode used as isolation diode in IC fabrication.
Select your answer using the codes given below.
Important Questions from Device Technology
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Maximum component density for a given PCB size can be obtained by
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In a silicon oxidation model, \(\rm \frac{B}{A}\) is the linear rate constant and τ accounts for the shift in the time coordinate to account for the presence of the initial oxide layer, then the linear law is represented as:
