Advantage of segmented memory in 8086 is A. Allows the memory capacity to be 1M byte, although the actual address is of 16 bit size. B. Allows the placing of code and data portions of the same program in different parts of memory. C. Allows the memory capacity to be 2M byte, although the actual address is of 16 bit size. D. Allows the placing of code and data portion of the same program in same parts of memory. E. Allows the memory capacity to be 1M byte, although the actual address is of 20 bit size Choose the correct answer from the options given below :
E and B only
How 8086 segmentation works. The CPU's registers are 16 bits wide, so an offset can span only 64 KB. To reach more memory the 8086 forms the physical address from a segment register and an offset:
\(\text{Physical address} = (\text{Segment} \times 16) + \text{Offset}\)
i.e. the 16-bit segment value is shifted left by four bits and the 16-bit offset added. The result is a 20-bit physical address, so the addressable space is
\(2^{20} = 1\ \text{MB}\)
Now test each statement.
A — "1 MB capacity although the actual address is 16 bits." FALSE. The capacity is indeed 1 MB, but the actual (physical) address placed on the address bus is 20 bits; 16 bits is only the size of each register used to build it. 16 bits alone would address just 64 KB.
B — "Allows code and data portions of the same program to be placed in different parts of memory." TRUE. The 8086 has four segment registers — CS (code), DS (data), SS (stack) and ES (extra) — so the code, data and stack of one program occupy independent 64 KB segments that can be relocated separately. This also makes programs position-independent and simplifies multiprogramming and code sharing.
C — "2 MB capacity." FALSE. 2 MB would need 21 address lines; the 8086 has exactly 20 (A0–A19).
D — "code and data in the same parts of memory." FALSE. It is the direct negation of B and defeats the purpose of segmentation (segments may legally overlap, but the advantage being tested is separation).
E — "1 MB capacity although the actual address is of 20-bit size." TRUE. This states the arithmetic above correctly.
The true statements are E and B.
Worked example of the address calculation. With CS = 1000H and IP = 2000H, the physical address is \(1000H \times 10H + 2000H = 12000H\) — 20 bits wide, as expected.
Hence, the correct answer is E and B only.
Similar Questions
Given below are two statements :
Statement I : In 8051 micro-controller register banks and stack reserves 32 bytes from locations 00 to 1F Hex
Statement II : Bit-Addressable RAM locations are 20 H to 2 F H.
In the light of the above statements, choose the most appropriate answer from the options given below :
Find the delay generated by Timer 0 in the following code of 8051 microcontroller : clock period = 1.085 µs.
MOV TMOD, #01H
MOV TLO, #3DH
MOV THO, #0A2H.
SET B TRO
Loop : J N B TFO, LOOP
CLR TRO
CLR TFO
In "JZ Next" instruction of 8051 microcontroller, which register's content is checked to see if it is zero?
Using 8051 assembly language programming numbers 54 H and 98 H are added. After addition the status of CY, AC and P flags are respectively:
In 8051 microcontroller, one machine cycle lasts in 12 oscillation period. Crystal oscillator's frequency is 11.0592 MHz. Find how long it takes to execute instruction MOV R4, # 25.
Which of the following statements are correct for a microcontroller ?
A. A microcontroller has on-chip I/O ports
B. A microcontroller has a fixed amount of RAM on the chip
C. The flag register in the 8051 is called program standard word
D. Auxiliary carry flag is set when there is a carry from D3 to D4 during an ADD or SUB operation
E. Overflow flag is only used to detect errors in unsigned arithmetic operations.
Choose the correct answer from the options given below :
Match List I with List II
LIST I (instruction of 8051 microcontroller) LIST II (Addressing mode) A. MOV A, # 32 H I. Register addressing mode B. MOV R 6, A II. Register Indirect addressing mode C. MOV R4, 7 FH III. Immediate Addressing mode D. MOV A, @ RO IV. Direct Addresing mode Choose the correct answer from the options given below:
The ALE line of an 8085 microprocessor is used to
Contents of ‘A’ register after execution of the following 8085 microprocessor program is
MVI A, 55 h
MVI C, 25 h
ADD C
DAA
Word 20 contains 40
Word 30 contains 50
Word 40 contains 60
Word 50 contains 70
Which of the following instructions loads 60 into the accumulator ?
(a) load immediate 60
(b) load direct 30
(c) load indirect 20
(d) load indirect 30
Which of the above statements are correct ?
Important Questions from Microprocessors
Register which is used to store values of arithmetic and logical operations is termed:
How many bytes of bit addressable memory is present in 8051 based microcontrollers?
A single instruction to clear the lower four bits of the accumulator in 8085 assembly language is-
In Microprocessor 8085 Address/Data buffer is a/an _______ buffer.
Microprocessor 8085 operates on a clock cycle with ______ duty cycle.
