Understanding Registers in the Instruction Cycle

The central processing unit (CPU) executes instructions by going through a cycle called the instruction cycle. This cycle typically involves fetching an instruction from memory, decoding it, and then executing it. Several key registers within the CPU play vital roles in managing this process. The question asks specifically which register holds the instruction that has just been fetched from memory.

Roles of CPU Registers in the Instruction Cycle

Let's look at the roles of the registers mentioned in the options during the instruction cycle:

• Memory Address Register (MAR): This register holds the memory address of the location the CPU wants to read data from or write data to. In the fetch phase, it holds the address of the instruction to be fetched.
• Instruction Register (IR): This register holds the instruction that has been fetched from memory. The CPU then decodes and executes the instruction stored in the IR.
• Program Counter (PC): This register holds the memory address of the next instruction to be fetched. After an instruction is fetched, the PC is typically incremented to point to the subsequent instruction in the program sequence.
• Memory Buffer Register (MBR) or Memory Data Register (MDR): This register temporarily holds the data that is being read from memory or is about to be written to memory. During the fetch phase, the instruction read from memory is temporarily placed in the MBR before being transferred to the Instruction Register (IR).

The Fetch Phase Explained

The fetch phase is the first step of the instruction cycle where the CPU retrieves an instruction from memory. Here's how the registers are involved:

1. The address of the next instruction to be fetched is taken from the Program Counter (PC) and placed into the Memory Address Register (MAR).
2. The CPU sends a read signal to memory, using the address in the MAR.
3. The instruction stored at that memory address is read from memory and placed into the Memory Buffer Register (MBR).
4. The Program Counter (PC) is incremented to point to the next instruction.
5. The instruction is transferred from the Memory Buffer Register (MBR) to the Instruction Register (IR).

From these steps, it is clear that the Instruction Register (IR) is the register that holds the instruction after it has been fetched from memory and is ready for the decode and execute phases.

Comparing the Registers

Based on their roles in the instruction cycle and the step-by-step fetch process, the register that specifically holds the last instruction fetched is the Instruction Register (IR).

Revision Table: Key Registers in Instruction Cycle

Additional Information: The Complete Instruction Cycle

The instruction cycle is a fundamental process in computer architecture. Beyond the fetch phase, it includes:

• Decode: The Control Unit interprets the instruction held in the IR to determine what operation is to be performed and which operands are needed.
• Execute: The CPU performs the operation specified by the instruction. This might involve arithmetic calculations by the Arithmetic Logic Unit (ALU), data movement, or control flow changes. Operands are fetched using MAR and MBR if they are in memory.
• Store (or Write Back): The results of the execution are written back to memory or a register, if required. This also involves MAR and MBR.

Understanding how these registers interact throughout the entire instruction cycle is crucial for understanding CPU operation.